Array substrate for display device and method of manufacturing the same
View Patent ↗An array substrate includes a substrate, a data line formed on the substrate, a passivation layer formed on the data line, a gate line including a gate electrode and a capacitor line formed on the passivation layer, a gate insulation layer formed on the gate electrode and the capacitor line, a semiconductor layer formed on the gate insulation layer, a contact hole formed through the passivation layer and the gate insulation layer to expose the data line and a source electrode and a drain electrode formed on the semiconductor layer. The capacitor electrode is overlapped with the data line. The source electrode is connected to the data line through the contact hole and the source electrode and the drain electrode include a transparent conductive material.
1. An array substrate comprising:
a substrate;
a data line formed on the substrate;
a passivation layer formed on the data line;
a gate line including a gate electrode and a capacitor line formed on the passivation layer, wherein the capacitor line is overlapped with the data line;
a gate insulation layer formed on the gate line and the capacitor line;
a semiconductor layer formed on the gate insulation layer;
a contact hole formed through the passivation layer and the gate insulation layer to expose the data line; and
a source electrode and a drain electrode formed on the semiconductor layer and the gate insulation layer,
wherein the source electrode is connected to the data line through the contact hole, and the source electrode and the drain electrode comprises a transparent conductive material.
2. The array substrate of claim 1 , wherein the drain electrode comprises a pixel electrode formed on the gate insulation layer.
3. The array substrate of claim 2 , wherein the pixel electrode comprises one of a reflective conductive material, a transflective conductive material, indium tin oxide (ITO) and indium zinc oxide (IZO).
4. The array substrate of claim 1 , wherein a width of the capacitor line is wider than a width of the data line.
5. A display device comprising:
a first substrate, wherein the first substrate comprises:
a data line formed on a substrate;
a passivation layer formed on the data line;
a gate line including a gate electrode and a capacitor line formed on the passivation layer, wherein the capacitor line is overlapped with the data line;
a gate insulation layer formed on the gate line and the capacitor line;
a semiconductor layer formed on the gate insulation layer;
a contact hole formed through the passivation layer and the gate insulation layer to expose the data line; and
a source electrode and a drain electrode formed on the semiconductor layer,
a second substrate including a black matrix; and
a liquid crystal layer interposed between the first substrate and the second substrate,
wherein the drain electrode comprises a pixel electrode formed on the gate insulation layer, and a distance of adjacent pixel electrodes is narrower than a width of the black matrix, a width of the capacitor line and a width of the data line.
6. The display device of claim 5 , wherein the source electrode and the drain electrode comprises a transparent conductive material.
7. The display device of claim 6 , wherein the transparent conductive material comprises one of a reflective conductive material, a transflective conductive material, indium tin oxide (ITO) and indium zinc oxide (IZO).
8. The display device of claim 5 , wherein a width of the capacitor line is wider than a width of the data line.