Ion implantation method and semiconductor device manufacturing method
View Patent ↗In the ion implantation method and semiconductor device manufacturing method relating to the present invention, a disc on which multiple semiconductor substrates are mounted is positioned in the manner that a first angle β 1 is made between an X-Y plane perpendicular to an ion beam and a line perpendicular to the Y-axis in a disc rotation plane. In this state, an ion beam is emitted to implant a first conductivity type impurity in the semiconductor substrates while the disc is rotated about a disc rotation axis. Then, the disc is positioned in the manner that a second angle β 2 is made between the X-Y plane and a line perpendicular to the Y-axis in the disc rotation plane. In this state, an ion beam is emitted to implant a second conductivity type impurity in the semiconductor substrates while the disc is rotated about the disc rotation axis.
1. A semiconductor device manufacturing method for emitting an ion beam to form impurity layers in multiple semiconductor substrates while a plate-shape support on which multiple semiconductor substrates are mounted in an annular form around a rotation center is rotated about the rotation center, comprising the steps of:
forming a first mask pattern having an opening over a region in which a first impurity layer is formed on the multiple semiconductor substrates having an element isolation region consisting of an insulation material and the opening edge positioned on the element isolation region;
emitting an ion beam to implant a first conductivity type impurity in the multiple semiconductor substrates while the support on which multiple semiconductor substrates each having the first mask pattern are mounted is positioned in a manner that a first angle is made between a plane perpendicular to an ion beam injection direction and a line perpendicular to a line passing through an ion beam irradiation point and the rotation center in a rotation plane of the support and rotated about the rotation center;
forming a second mask pattern having an opening over a region in which a second impurity layer is formed on the multiple semiconductor substrates and the opening edge positioned on the element isolation region;
emitting an ion beam to implant a second conductivity type, which is the conductivity type opposite to the first conductivity type, impurity in the multiple semiconductor substrates while the support on which multiple semiconductor substrates each having the second mask pattern are mounted is positioned in a manner that a second angle is made between the plane perpendicular to the ion beam injection direction and the line perpendicular to the line passing through the ion beam irradiation point and the rotation center in the rotation plane of the support and rotated about the rotation center;
emitting an ion beam to implant the first conductivity type impurity in the multiple semiconductor substrates while the support on which multiple semiconductor substrates each having the first mask pattern are mounted is positioned in a manner that the second angle is made between the plane perpendicular to the ion beam injection direction and the line perpendicular to the line passing through the ion beam irradiation point and the rotation center in the rotation plane of the support and rotated about the rotation center; and
emitting an ion beam to implant the second conductivity type impurity in the multiple semiconductor substrates while the support on which multiple semiconductor substrate each having the second mask pattern are mounted is positioned in a manner that the first angle is made between the plane perpendicular to the ion beam injection direction and the line perpendicular to the line passing through the ion beam irradiation point and the rotation center in the rotation plane of the support and rotated about the rotation center.
2. A semiconductor device manufacturing method according to claim 1 , wherein the first and second angles are angles at which the rotation plane of the support is positioned symmetrically about the plane containing the ion beam and the rotation center.
3. A semiconductor device manufacturing method according to claim 1 , wherein the first and second impurity layers are wells.
4. A semiconductor device manufacturing method according to claim 1 , wherein each semiconductor substrate is mounted on the support in a manner that an angle of 45° is made between a line passing through a center and notch of the semiconductor substrate and a line passing through the center of the semiconductor substrate and the rotation center of the support.
5. A semiconductor device manufacturing method according to claim 4 , wherein a boundary between the first and second impurity layers formed on the semiconductor substrate surface is parallel to or perpendicular to a line passing through the center and notch of the semiconductor substrate.
6. A semiconductor device manufacturing method according to claim 1 , wherein the element isolation region has a width of 130 nm or smaller in the direction perpendicular to a boundary between the first and second impurity layers.
7. A semiconductor device manufacturing method for emitting an ion beam to form impurity layers in multiple semiconductor substrates while a plate-shape support on which multiple semiconductor substrates are mounted in an annular form around a rotation center is rotated about the rotation center, comprising the steps of:
forming a first mask pattern having an opening over a region in which a first impurity layer is formed on the multiple semiconductor substrates having an element isolation region consisting of an insulation material and the opening edge positioned on the element isolation region;
emitting an ion beam to implant a first conductivity type impurity in the multiple semiconductor substrates while the support on which multiple semiconductor substrates each having the first mask pattern are mounted is positioned in a manner that a first angle is made between a plane perpendicular to an ion beam injection direction and a line perpendicular to a line passing through an ion beam irradiation point and the rotation center in a rotation plane of the support and rotated about the rotation center;
forming a second mask pattern having an opening over a region in which a second impurity layer is formed on the multiple semiconductor substrates and the opening edge positioned on the element isolation region; and
emitting an ion beam to implant a second conductivity type, which is the conductivity type opposite to the first conductivity type, impurity in the multiple semiconductor substrates while the support on which multiple semiconductor substrates each having the second mask pattern are mounted is positioned in a manner that a second angle is made between the plane perpendicular to the ion beam injection direction and the line perpendicular to the line passing through the ion beam irradiation point and the rotation center in the rotation plane of the support and rotated about the rotation center;
wherein each semiconductor substrate is mounted on the support in a manner that an angle of 45° is made between a line passing through a center and notch of the semiconductor substrate and a line passing through the center of the semiconductor substrate and the rotation center of the support.
8. A semiconductor device manufacturing method according to claim 7 , wherein the first and second angles are angles at which the rotation plane of the support is positioned symmetrically about the plane containing the ion beam and the rotation center.
9. A semiconductor device manufacturing method according to claim 7 , wherein the first and second impurity layers are wells.
10. A semiconductor device manufacturing method according to claim 7 , wherein a boundary between the first and second impurity layers formed on the semiconductor substrate surface is parallel to or perpendicular to a line passing through the center and notch of the semiconductor substrate.
11. A semiconductor device manufacturing method according to claim 8 , wherein a boundary between the first and second impurity layers formed on the semiconductor substrate surface is parallel to or perpendicular to a line passing through the center and notch of the semiconductor substrate.
12. A semiconductor device manufacturing method according to claim 9 , wherein a boundary between the first and second impurity layers formed on the semiconductor substrate surface is parallel to or perpendicular to a line passing through the center and notch of the semiconductor substrate.
13. A semiconductor device manufacturing method according to claim 7 , wherein the element isolation region has a width of 130 nm or smaller in the direction perpendicular to a boundary between the first and second impurity layers.
14. A semiconductor device manufacturing method according to claim 10 , wherein the element isolation region has a width of 130 nm or smaller in the direction perpendicular to a boundary between the first and second impurity layers.