Low-noise flip-chip packages and flip chips thereof
View Patent ↗A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.
1. A flip-chip package, comprising:
a carrier substrate having first and second opposing main faces; and
a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array,
wherein:
the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another;
the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and
each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.
2. The flip-chip package as claimed in claim 1 , wherein said signal-reference connections are ground supply connections.
3. The flip-chip package as claimed in claim 1 or 2 , wherein the signal-reference connection of the substrate-contact boundary forms a boundary extending via a plurality of connections of the connection array through the carrier substrate to a plurality of electrical contacts at the second main face of the carrier substrate for connection to the common signal-reference element.
4. The flip-chip package as claimed in claim 1 , wherein each of the first circuitry portion and the second circuitry portion has its own separate power-supply connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a corresponding power supply in an external circuit.
5. The flip-chip package as claimed in claim 1 , wherein said substrate-contact boundary comprises a single substrate contact.
6. The flip-chip package as claimed in claim 1 , wherein said substrate-contact boundary comprises at least two substrate contacts.
7. The flip-chip package as claimed in claim 6 , wherein:
said first and second circuitry portions are spaced apart from one another in a separation direction; and
the substrate contacts of the substrate-contact boundary are also spaced apart from one another in the separation direction.
8. The flip-chip package as claimed in claim 6 , wherein at least one substrate contact of the substrate-contact boundary has its own signal-reference connection extending separately from the other said signal-reference connections via a connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to said common signal-reference element.
9. The flip-chip package as claimed in claim 8 , wherein each substrate contact of the substrate-contact boundary has its own signal-reference connection extending separately from the other said signal-reference connections via a connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to said common signal-reference element.
10. The flip-chip package as claimed in claim 9 , wherein the signal-reference connection of each substrate contact forms a boundary extending via a plurality of connections of the connection array through the carrier substrate to a plurality of electrical contacts at the second main face of the carrier substrate for connection to the common signal-reference element.
11. The flip-chip package as claimed in claim 5 , wherein:
said first and second circuitry portions are spaced apart from one another in a separation direction;
the flip-chip substrate has a thickness T;
said substrate contact has a width W in the separation direction; and
said width W is large enough compared to the thickness T such that the substrate-contact boundary provides substantial noise isolation between said circuitry portions.
12. The flip-chip package as claimed in claim 11 , wherein W≧T, and preferably wherein W≧2T, and more preferably wherein W≧4T.
13. The flip-chip package as claimed in claim 5 , wherein said substrate contact is generally elongate so as to form a wall between said circuitry portions.
14. The flip-chip package as claimed in claim 1 , wherein one of said first and second circuitry portions is an analogue circuitry portion and the other one of said circuitry portions is a digital circuitry portion.
15. The flip-chip package as claimed in claim 1 , wherein the signal-reference connections are electrically isolated from one another within the package.