IP Library Granted Patent US 7,750,366
Granted Patent B2
US 7,750,366 · App. 12/180,920 · Granted Jul 6, 2010

Solid-state imaging element and method for manufacturing the same

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Quick Facts
Patent No.
US 7,750,366
App. No.
12/180,920
Granted
Jul 6, 2010
Kind
B2
Abstract

A solid-state imaging element includes a layered substrate made of silicon and composed of, for example, an N-type substrate, a P-type layer, and an N-type layer. In the layered substrate, an imaging region in which a plurality of pixels are arranged and a peripheral circuit region are formed. A recess reaching the reverse face of the P-type layer is formed in a reverse face portion of the layered substrate in the imaging region, and a reflective film is formed on at least the inner face of the recess. Light is reflected on the reverse face and the obverse face of the layered substrate.

Claims (25)

1. A solid-state imaging element in which an imaging region in which a plurality of pixels each including a photoelectric converter and a transistor are provided and a peripheral circuit region are formed, comprising:

a substrate including a silicon substrate and a first semiconductor layer containing a P-type impurity at a concentration higher than that in the silicon substrate and having an obverse face on which the plurality of pixels are provided and a reverse face portion,

wherein a recess reaching the reverse face of the first semiconductor layer is formed in the reverse face portion of the substrate in the imaging region.

2. The solid-state imaging element of claim 1 , wherein

the substrate further includes a second semiconductor layer provided on the first semiconductor layer.

3. The solid-state imaging element of claim 2 , wherein

the first semiconductor layer and the second semiconductor layer are formed by epitaxial growth.

4. The solid-state imaging element of claim 1 , wherein

the first semiconductor layer is formed by ion implantation to form an impurity concentration peak, and

a part under the photoelectric converter which forms the impurity concentration peak is located shallower than a part under the transistor which forms the impurity concentration.

5. The solid-state imaging element of claim 1 , further comprising:

a light reflective film formed on an inner face of the recess.

6. The solid-state imaging element of claim 1 , further comprising:

in the peripheral circuit region, a substrate contact part including a substrate contact provided on the substrate and a pad connected to the substrate contact.

7. The solid-state imaging element of claim 1 , further comprising:

a silicon germanium layer formed on a region of the substrate in which the photoelectric converter is formed and having the same conductivity as the first semiconductor layer.

8. The solid-state imaging element of claim 2 , wherein

a total thickness of the first semiconductor layer and the second semiconductor layer in a region where the recess is formed is in a range between 5 μm and 8 μm, both inclusive.

9. The solid-state imaging element of claim 1 , further comprising:

a wiring over the photoelectric converter,

wherein the first semiconductor layer is in contact with the bottom of the photoelectric converter.

10. The solid-state imaging element of claim 1 , wherein

the first semiconductor layer has an impurity concentration in a range between 1×10 18 atoms/cm 3 and 1×10 21 atoms/cm 3 , both inclusive.

11. The solid-state imaging element of claim 5 , wherein

the light reflective film is made of a metal material, a dielectric material, or an organic material.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2014
From: PANASONIC CORPORATION (FORMERLY MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.)
To: GODO KAISHA IP BRIDGE 1
Reel/Frame 032152/0514 →
CHANGE OF NAME Recorded Mar 6, 2009
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 022363/0306 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2008
From: OKINO, TORU; MORI, MITSUYOSHI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 021579/0109 →