Thin film transistor and liquid crystal display having the same
View Patent ↗A thin film transistor (TFT) substrate includes: a plurality of gate lines extending in one direction, a plurality of data lines extending in a direction intersecting the gate lines, a pixel electrode formed in a pixel region defined by an intersection of the gate line and the data line, and with one side of the pixel electrode overlapping a portion of one data line and another side of the pixel electrode overlapping a portion of another data line. The TFT further includes a storage electrode line having a storage electrode disposed in a central portion of the pixel region.
1. A thin film transistor (TFT) substrate, comprising:
a plurality of gate lines extending in one direction;
a plurality of data lines extending in a direction intersecting the gate lines;
a pixel electrode formed in a pixel region defined by an intersection of the gate line and the data line, one side of the pixel electrode overlapping a portion of one data line and another side of the pixel electrode overlapping a portion of another data line; and
a storage electrode line having a storage electrode disposed in a central portion of the pixel region,
wherein the pixel electrode comprises: a horizontal part passing through a central region between the gate lines; a vertical part passing through a central region between the data lines; a central art defined in an intersecting region of the vertical part and the horizontal part in the central portion of the pixel region; and an oblique part formed from the vertical part, the horizontal part and the central part in an oblique direction, and having a plurality of protruding electrodes spaced apart by a plurality of microslits.
2. The TFT substrate of claim 1 , wherein the data line has a predetermined protruding pattern.
3. The TFT substrate of claim 2 , wherein the protruding pattern periodically protrudes to the left and the right across every one or two pixel regions.
4. The TFT substrate of claim 1 , wherein the protruding electrode extending from the central part is perpendicular to one edge of the central part.
5. The TFT substrate of claim 1 , wherein one region of the pixel electrode partially overlapping the one data line and another region of the pixel electrode partially overlapping the another data line are diagonally arranged with respect to the central portion of the pixel region.
6. The TFT substrate of claim 1 , wherein the storage electrode line comprises a region that upwardly extends in an oblique direction with respect to the storage electrode.
7. The TFT substrate of claim 6 , wherein the storage electrode line comprises a region that extends in the same direction as a microslit.
8. The TFT substrate of claim 1 , further comprising a TFT connected to the gate line, the data line and the pixel electrode.
9. The TFT substrate of claim 8 , wherein the TFT is disposed in a central region between the data lines.
10. The TFT substrate of claim 8 , wherein the TFT is connected to the one data line in the pixel region of an odd-numbered row, and connected to another data line adjacent to the one data line in the pixel region of an even-numbered row.
11. The TFT substrate of claim 1 , further comprising:
a gate insulation layer disposed between the gate line and the data line; and
a passivation layer disposed between the data line and the pixel electrode, the passivation layer having a multilayered structure of a first insulation layer and a second insulation layer.
12. The TFT substrate of claim 1 , wherein the passivation layer comprises: a gate insulation layer disposed between the gate line and the data line; a passivation layer disposed between the data line and the pixel electrode; and a color filter disposed on the passivation layer.
13. The TFT substrate of claim 11 , wherein the storage electrode overlaps a portion of the pixel electrode with the gate insulation layer and the first insulation layer interposed therebetween.
14. A thin film transistor (TFT) substrate, comprising:
a plurality of first gate lines and a plurality of second gate lines extending in one direction, and spaced apart from each other;
a plurality of data lines extending in another direction intersecting the first gate lines and the second gate lines;
a first pixel electrode and a second pixel electrode provided in a pixel region including a first sub pixel region and a second sub pixel region defined by intersections of the first gate lines and the second gate lines with the data line, a predetermined region at one side of the pixel electrode partially overlapping one data line and a predetermined region at another side of the pixel electrode partially overlapping another data line; and
a first storage electrode line and second storage electrode line spaced apart from each other, and having a first storage electrode and a second storage electrode in central portions of the first sub pixel region and the second sub pixel region,
wherein at least one of the first pixel electrode and the second pixel electrode comprises: a horizontal part passing through a central region between the gate lines; a vertical part passing through a central region between the data lines; a central part defined in an intersecting region of the vertical part and the horizontal part in the central portion of the pixel region; and an oblique part formed from the vertical part, the horizontal part and the central part in an oblique direction, and having a plurality of protruding electrodes spaced apart by a plurality of microslits.
15. The TFT substrate of claim 14 , wherein the data line has a redetermined protruding pattern.