Device, system and method of accessing data stored in a memory

1. An apparatus comprising:

a memory to store a plurality of data items to be accessed by a processor;

a cache manager to manage a cache within the memory, wherein:

the cache is distinct and separate from a remaining portion of the memory where the plurality of data items is stored; and

the cache including a plurality of pointer entries, wherein each pointer entry includes an identifier of a respective data item and a pointer to an address of the data item; and

a search module to:

receive from the cache manager an identifier of a requested data item;

search the plurality of pointer entries for the identifier of the requested data item; and

only when a pointer entry is detected to include an identifier of a respective data item that matches the identifier of the requested data item then, provide the cache manager with the pointer from the detected entry.

2. The apparatus of claim 1 , wherein the cache manager comprises a software cache manager executed by the processor, and wherein the search module comprises a hardware search module.

3. The apparatus of claim 1 , wherein the search module comprises:

one or more input registers, wherein the cache manager stores the identifier of the requested data item and one or more search parameters in the input registers;

one or more output registers accessible by the cache manager; and

a searcher to:

search the plurality of entries for the identifier of the requested data item based on the search parameters; and

store the pointer from the detected entry in the output registers.

4. The apparatus of claim 3 , wherein the searcher stores, in the output registers, an indication of an address of an empty entry in the cache.

5. The apparatus of claim 3 , wherein the search parameters include at least one of the group including the length of the identifiers, the maximum number of entries in the cache, the size of the entries, an indication of a first address of the cache, the size of the cache, and an indication of a last address of the cache.

6. The apparatus of claim 1 , wherein the cache manager initializes the cache by storing an empty-address identifier in each entry of the cache.

7. The apparatus of claim 6 , wherein the cache manager provides the search module with the empty-address identifier, and wherein the search module provides the cache manager with an address of an entry in the cache, which includes the empty-address identifier.

8. The apparatus of claim 7 , wherein the cache manager adds a pointer entry to the cache by replacing the empty-address identifier with the pointer entry.

9. The apparatus of claim 1 comprising:

a direct-memory-access module to import into the memory at least one data item from another memory,

wherein the cache manager adds at least one pointer entry to the cache, the pointer entry pointing to the at least one data item.

10. The apparatus of claim 1 comprising a system-on-chip.

11. The apparatus of claim 10 , wherein the system-on-chip comprises a communication network gateway system-on-chip, and wherein the plurality of data items include information related to a plurality of communication packets.

12. A method comprising:

storing a plurality of data items in a memory, the data items to be accessed by a processor;

managing a cache in the memory, wherein:

the cache is distinct and separate from a remaining portion of the memory where the plurality of data items is stored; and

the cache including a plurality of pointer entries, wherein each pointer entry includes an identifier of a respective data item and a pointer to an address of the data item;

searching the plurality of pointer entries for an identifier of a requested data item; and

only when a pointer entry is detected to include an identifier of a respective data item that matches the identifier of the requested data item then, providing the pointer from the detected entry.

13. The method of claim 12 , wherein the managing comprises using software executed by the processor, and wherein the searching comprises using hardware.

14. The method of claim 12 comprising:

storing the requested identifier and one or more search parameters in one or more input registers, wherein the searching comprises searching the plurality of entries for the identifier of the requested data item based on the search parameters, and

wherein the providing comprises storing the pointer from the detected entry in one or more output registers.

15. The method of claim 14 comprising storing in the output registers an indication of an address of an empty entry in the cache.

16. The method of claim 14 . wherein the search parameters include at least one of the group including the length of the identifiers, the maximum number of entries in the cache, the size of the entries, an indication of a first address of the cache, the size of the cache, and an indication of a last address of the cache.

17. The method of claim 12 comprising initializing the cache by storing an empty address identifier in each entry of the cache.

18. The method of claim 17 comprising detecting an address of an entry in the cache, which includes the empty-address identifier.

19. The method of claim 18 comprising adding a pointer entry to the cache by replacing the empty-address identifier with the pointer entry.

20. The method of claim 12 comprising:

importing into the memory at least one data item from another memory; and

adding at least one pointer entry to the cache, the pointer entry pointing to the at least one data item.