IP Library Granted Patent US 9,093,993
Granted Patent B2
US 9,093,993 · App. 12/183,111 · Granted Jul 28, 2015

Power saving circuit for PWM circuit

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Quick Facts
Patent No.
US 9,093,993
App. No.
12/183,111
Granted
Jul 28, 2015
Kind
B2
Abstract

The present invention provides a power saving circuit for PWM circuit. The power saving circuit is utilized to control at least one internal circuit. The power saving circuit comprises a switching circuit which generates a switching signal. The power saving circuit controls the internal circuit in response to the switching. The power saving circuit disables the internal circuit for power saving when the switching signal is disabled.

Claims (23)

1. A power saving circuit for PWM circuit, comprising:

a switching circuit generating a switching signal; and

a dead-time control circuit generating a dead-time control signal to control at least one internal circuit in response to the switching signal, wherein the dead-time control signal disables the internal circuit for power saving when the switching signal is disabled.

2. The power saving circuit for PWM circuit as claimed in claim 1 , wherein the dead-time control signal is enabled before the switching signal is enabled.

3. The power saving circuit for PWM circuit as claimed in claim 2 , wherein the dead-time control circuit comprises a pre-enabling circuit for pre-enabling the dead-time control signal before the switching signal is enabled.

4. The power saving circuit for PWM circuit as claimed in claim 1 , wherein the dead-time control signal is disabled after the switching signal is disabled.

5. The power saving circuit for PWM circuit as claimed in claim 4 , wherein the dead-time control circuit comprises a delay circuit for delaying the disablement of the dead-time control signal when the switching signal is disabled.

6. The power saving circuit for PWM circuit as claimed in claim 1 , further comprising an oscillator generating a pulse signal for the switching circuit generating the switching signal in response to the pulse signal.

7. The power saving circuit for PWM circuit as claimed in claim 1 , further comprising an oscillator generating an oscillation signal for the dead-time control circuit controlling the dead-time control signal in response to the oscillation signal.

8. The power saving circuit for PWM circuit as claimed in claim 7 , wherein the dead-time control circuit enables the dead-time control signal when the oscillation signal is lower than a threshold signal.

9. The power saving circuit for PWM circuit as claimed in claim 7 , wherein the oscillator further generates a pulse signal for the dead-time control circuit controlling the dead-time control signal in response to the oscillation signal and the pulse signal.

10. The power saving circuit for PWM circuit as claimed in claim 1 , wherein the switching signal is utilized to switch a transformer.

11. The power saving circuit for PWM circuit as claimed in claim 1 , wherein the internal circuit can be a protection circuit of the PWM circuit.

12. The power saving circuit for PWM circuit as claimed in claim 11 , wherein the protection circuit generates a reset signal to reset the switching circuit for disabling the switching signal.

13. The power saving circuit for PWM circuit as claimed in claim 1 , wherein the internal circuit is included in the PWM circuit internally.

14. A power saving circuit for PWM circuit, comprising:

a switching circuit generating a switching signal to switch a circuit;

wherein the switching signal is further utilized to control at least one internal circuit, the switching signal disables the internal circuit for power saving when the switching signal is disabled.

15. The power saving circuit for PWM circuit as claimed in claim 14 , further comprising an oscillator generating a pulse signal for the switching circuit generating the switching signal in response to the pulse signal.

16. The power saving circuit for PWM circuit as claimed in claim 14 , wherein the switching signal is utilized to switch a transformer.

17. The power saving circuit for PWM circuit as claimed in claim 14 , wherein the internal circuit can be a protection circuit of the PWM circuit.

18. The power saving circuit for PWM circuit as claimed in claim 17 , wherein the protection circuit generates a reset signal to reset the switching circuit for disabling the switching signal.

19. The power saving circuit for PWM circuit as claimed in claim 14 , wherein the internal circuit is included in the PWM circuit internally.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT RECORDED AT REEL 046410, FRAME 0933 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046410/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2017
From: FAIRCHILD (TAIWAN) CORPORATION (FORMERLY SYSTEM GENERAL CORPORATION)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 042328/0318 →
CHANGE OF NAME Recorded May 2, 2016
From: SYSTEM GENERAL CORP.
To: FAIRCHILD (TAIWAN) CORPORATION
Reel/Frame 038594/0168 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2008
From: HUANG, WEI-HSUAN
To: SYSTEM GENERAL CORP.
Reel/Frame 021320/0109 →