Solid state image sensor
View Patent ↗Forming an impurity region 6 and an impurity region 5 having a lower concentration than the impurity region 6 in a lower layer region of a gate electrode close to the boundary with a signal electron-voltage conversion section of a horizontal CCD outlet makes it possible to smooth a potential distribution at the time of transfer, improve the transfer efficiency, increase the number of saturated electrons and reduce variations in the transfer efficiency and variations in saturation.
1. A solid-state image sensor comprising:
an N-type semiconductor substrate;
a P-type well formed in the N-type semiconductor substrate;
an N-type horizontal transfer region formed in the P-type well;
a gate insulating film formed on a surface of the N-type semiconductor substrate;
a first storage gate electrode formed on a horizontal transfer outlet of the N-type horizontal transfer region via the gate insulating film;
a first offset gate electrode formed on the horizontal transfer outlet via the gate insulating film which is next to the first storage gate electrode;
a first P-type region in the N-type horizontal transfer region under the first offset gate electrode; and
a first N-type region formed in the horizontal transfer region directly under the first offset gate electrode and the first storage gate electrode,
wherein a concentration of an N-type impurity of the first N-type region is lower than a concentration of an N-type impurity of the N-type horizontal transfer region, wherein a bottom of the first N-type region is lower than a bottom of the N-type horizontal transfer region.
2. The solid-state image sensor according to claim 1 , further comprising:
a second offset gate electrode formed on the N-type horizontal transfer region next to the first storage gate electrode on the other side opposite to the first offset gate electrode,
wherein the first N-type region extends under the second offset gate electrode.
3. The solid-state image sensor according to claim 2 , further comprising:
a second storage gate electrode formed on the N-type horizontal transfer region next to the second offset gate electrode on the other side opposite to the first storage gate electrode,
wherein the first N-type region extends under the second storage gate electrode.
4. The solid-state image sensor according to claim 3 , wherein a gate length of the second storage gate electrode is shorter than a gate length of the first storage gate electrode.
5. The solid-state image sensor according to claim 1 , wherein a width of the N-type horizontal transfer region under the first storage gate electrode is larger than a width of the N-type horizontal transfer region under the first offset gate electrode.