IP Library Granted Patent US 8,063,997
Granted Patent B2
US 8,063,997 · App. 12/186,491 · Granted Nov 22, 2011

Integrated programmable tuner

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Quick Facts
Patent No.
US 8,063,997
App. No.
12/186,491
Granted
Nov 22, 2011
Kind
B2
Abstract

An integrated tuner is programmable to optimize its components for either analog signal reception or digital signal reception. Power to the components is increased for analog operation and decreased for digital operation. The tuner also includes a selectable and integrated low noise amplifier that may be selected for single-signal reception and bypassed for multi-signal reception.

Claims (70)

1. A tuner comprising:

a plurality of tuner components configured to receive one of analog and digital input RF signals on a common input circuit and convert the signals to output IF signals;

a data-storage circuit for storing parameters associated with various ones of the plurality of tuner components; and

a controller configured to access and use the stored parameters to re-configure and switch the operation of at least one of the tuner components to

an analog mode, and control the operation of the at least one of the tuner components at a high power level in response to detecting the receipt of an analog input RF signal, and

a digital mode, and control the operation of the at least one of the tuner components at a low power level in response to detecting the receipt of a digital input RF signal.

2. The tuner of claim 1 , wherein the tuner components include a low noise amplifier circuit, wherein the controller is configured to control the operation of the low noise amplifier circuit at a high power level in response to detecting an analog input RF signal, and to control the operation of the low noise amplifier circuit at a low power level in response to detecting a digital input RF signal.

3. A tuner comprising:

a plurality of tuner components configured to receive one of analog and digital input RF signals on a common input circuit and convert the signals to output IF signals; and

a controller configured to

control the operation of at least one of the tuner components at a high power level in response to detecting the receipt of an analog input RF signal, and

control the operation of the at least one of the tuner components at a low power level in response to detecting the receipt of a digital input RF signal;

wherein the tuner components include a low noise amplifier circuit, wherein the controller is configured to operate the low noise amplifier circuit in response to detecting a single-tuner input signal, and to power down the low noise amplifier circuit in response to detecting a multi-tuner input signal.

4. A tuner comprising:

a plurality of tuner components configured to receive one of analog and digital input RF signals on a common input circuit and convert the signals to output IF signals; the tuner components include a low noise amplifier circuit, and

a controller configured to

control the operation of at least one of the tuner components at a high power level in response to detecting the receipt of an analog input RF signal, and

control the operation of the at least one of the tuner components at a low power level in response to detecting the receipt of a digital input RF signal; and

route single-tuner input signals to the low noise amplifier circuit, and to route multi-tuner input signals to a different amplifier circuit.

5. The tuner of claim 1 , further including a low noise amplifier circuit, wherein the controller is configured to control the operation of the low noise amplifier

at a high power level in response to detecting an analog single-tuner input RF signal,

at a low power level in response to detecting a digital single-tuner input RF signal, and

in a powered-down state in response to detecting a multi-tuner input RF signal.

6. The tuner of claim 1 , further including a low noise amplifier circuit, wherein the controller is configured to control the operation of the low noise amplifier

at a high power level in response to detecting an analog single-tuner input RF signal,

at a low power level in response to detecting a digital single-tuner input RF signal, and

in a powered-down state in response to detecting no single-tuner input RF signal

7. The tuner of claim 1 , wherein

the plurality of tuner components and the controller are integrated on an integrated circuit chip,

the tuner components include a converter circuit that converts the signal to an output IF signal, and

the controller is configured to operate the converter circuit at a high power level for converting an analog input RF signal, and to operate the converter circuit at a low power level for converting a digital input RF signal.

8. The tuner of claim 1 ,

wherein the tuner components include a low noise amplifier circuit,

further including an RF attenuator circuit configured to attenuate the output of the low noise amplifier circuit, and

wherein the controller is configured to control the RF attenuator at a high signal gain for attenuating a low-strength signal, and at a low signal gain for attenuating a high-strength signal.

9. The tuner of claim 1 ,

further including a mixer circuit configured to mix the input RF signal with another signal to convert the input RF signal to an IF signal,

wherein the controller is configured to supply a high bias current to the mixer for mixing analog input RF signals, and to supply a low bias current to the mixer for mixing digital input RF signals.

10. The tuner of claim 1 , wherein the controller is configured to control parameters of at least one of the tuner components for supplying a high input bias current in response to an analog input RF signal and for supplying a low input bias current in response to a digital input RF signal.

11. A tuner circuit for receiving and processing analog and digital RF signals received on a common input, the circuit comprising:

an input signal detector configured to detect whether an input RF signal is an analog signal or a digital signal;

an amplifier circuit configured to amplify the input RF signal;

a converter circuit configured to convert the amplified RF signal to an output IF signal; and

a controller configured to

in response to detecting an analog input RF signal, controlling at least one of the amplifier circuit to operate at a high power and the converter circuit to operate at a high bias current, and

in response to detecting a digital input RF signal, controlling at least one of the amplifier circuit to operate at a low power and the converter circuit to operate at a low bias current.

12. The tuner circuit of claim 11 , wherein the controller is configured to control the amplifier circuit to operate at a high power level in response to the detected input RF signal being an analog signal, and to control the amplifier circuit to operate at a low power level in response to the detected input RF signal being a digital signal.

13. The tuner circuit of claim 11 , wherein the controller is configured to control the supply of a high bias current to the converter circuit in response to the detected input RF signal being an analog signal, and to control the supply of a low bias current to the converter circuit in response to the detected input RF signal being a digital signal.

14. The tuner circuit of claim 11 , wherein the controller is configured to

in response to the detected input RF signal being an analog signal, control the amplifier circuit to operate at a high power level and control the supply of a high bias current to the mixer circuit, and

in response to the detected input RF signal being a digital signal, control the amplifier circuit to operate at a low power level and control the supply of a low bias current to the mixer circuit.

15. The tuner circuit of claim 11 , wherein the controller is configured to control the amplifier circuit in a power off state in the absence of a single-tuner input signal.

16. The tuner circuit of claim 11 ,

further including a memory circuit that stores variables for use by the controller in controlling the operation of at least one of the amplifier circuit and the converter circuit, the variables including a first set of variables for use in processing analog input RF signals and a second set of variables for use in processing digital input RF signals, and

wherein the controller is a programmable controller that is configured to

in response to the detected input RF signal being an analog signal, retrieve and use the first set of stored variables control the operation of the at least one of the amplifier circuit and the converter circuit, and

in response to the detected input RF signal being a digital signal, retrieve and use the second set of stored variables control the operation of the at least one of the amplifier circuit and the converter circuit.

17. A multimedia receiver for receiving multiple analog and digital input RF signals from a broadband network, the receiver comprising:

an input circuit configured to receive the analog and digital input signals;

a multi-tuner amplifier circuit configured to amplify received multi-tuner input signals;

a single-tuner amplifier circuit configured to amplify received single-tuner input signals;

an RF attenuator circuit configured to attenuate the amplified output of the single-tuner amplifier circuit;

a mixer circuit configured to mix the attenuated output of the RF attenuator circuit to generate an IF signal;

a controller configured to

control the operation of the single-tuner amplifier circuit at a high power level to amplify analog input signals,

control the operation of the single-tuner amplifier circuit at a low power level to amplify digital input signals,

operate the RF attenuator circuit at a high signal gain for attenuating a low-strength signal,

operate the RF attenuator circuit at a low signal gain for attenuating a high-strength signal,

supply a high bias current to the mixer circuit for mixing analog input RF signals, and

supply a low bias current to the mixer circuit for mixing digital input RF signals.