Current-fed multiple-output power converter

1. A power converter comprising:

a first stage comprising a current source for generating a current signal; and

a second stage comprising:

n output circuits coupled to the current source for converting the current signal into n corresponding output voltages, wherein each of the n output circuits comprises an output switch responsive to a corresponding n th control signal for regulating the corresponding n th output voltage; and

a controller for generating the n control signals comprising:

for each of the n output circuits:

an error amplifier configured to generate an output signal based upon a comparison of the output voltage of the n th output circuit and a corresponding n th reference voltage;

a waveform generator for generating a waveform signal, wherein the waveform signals for the n output circuits are characterized by a common amplitude and period, and wherein the phases of the waveforms signals are spaced at predetermined intervals; and

a summing circuit for summing the output of the error amplifier and the waveform signal to generate an amplitude-shifted waveform signal; and

a comparator circuit for outputting the n control signals to the output switches based upon a comparison of the relative amplitudes of the amplitude-shifted waveform signals.

2. The power converter of claim 1 , wherein current source comprises a single magnetic device.

3. The power converter of claim 2 , wherein the current source comprises a buck converter.

4. The power converter of claim 2 , wherein the current source comprises a boost converter.

5. The power converter of claim 2 , wherein current source is isolated from the second stage and comprises a flyback converter.

6. The power converter of claim 1 , wherein n is a number greater than 1.

7. The power converter of claim 1 , wherein the waveform signal generated by each waveform generator is a triangular waveform signal.

8. The power converter of claim 1 , wherein the phases of the waveforms are equally spaced, and wherein the predetermined intervals are equal to 360/n degrees.

9. The power converter of claim 1 , wherein the comparator is configured to output a control signal to the output switch of the control circuit corresponding to the amplitude-shifted waveform signal having the largest amplitude.

10. The power converter of claim 1 , wherein the control signals generated by the controller for controlling the output switches of the n output circuits are characterized by a fixed-frequency switching cycle.

11. The power converter of claim 2 , wherein the current source is a controlled switch-mode current source.

12. The power converter of claim 11 , wherein the current source comprises a controller and at least two switches for controlling a magnitude of the current signal, wherein the switches are responsive to corresponding control signals generated by the controller.

13. The power converter of claim 12 , wherein the controller of the first stage generates the control signals based at least in part upon a sum of the outputs of the error amplifiers corresponding to each of the n output circuits.

14. The power converter of claim 1 , wherein at least one of the output switches is a switch selected from the group consisting of: a 3-terminal MOSFET switch, a 4-terminal MOSFET switch, a J-FET switch, and a CMOS switch.

15. The power converter of claim 1 , wherein at least one output switch comprises an N-Channel Power MOSFET having a gate terminal, a source terminal, a drain terminal, and a body terminal, wherein the body terminal is coupled to a voltage that is no greater than the lowest of the n output voltages.

16. The power converter of claim 15 , wherein the MOSFET comprises a short circuit metallization layer, and wherein the short circuit metallization layer comprises the source terminal and the base terminal.

17. A method for regulating n voltage outputs of a current-fed power converter, wherein each voltage output is generated by a corresponding switched output circuit, comprising:

for each of the n voltage outputs:

generating an error signal based upon a comparison of the n th voltage output and a corresponding n th reference voltage;

generating a waveform signal, wherein the waveform signals for the n output circuits are characterized by a common amplitude and period, and wherein the phases of the waveforms signals are spaced at predetermined intervals; and

summing the error signal and the waveform signal to create a corresponding amplitude-shifted waveform signal; and

performing a comparison of the amplitude-shifted waveform signals corresponding to each of the n voltage outputs to determine which has the largest amplitude; and

outputting a control signal to the output circuit corresponding to the determined amplitude-shifted waveform signal, wherein the output circuit comprises a switch for regulating the corresponding voltage output responsive to the control signal.