Method for testing integrated circuits mounted on a carrier
View Patent ↗A method for testing integrated circuits mounted on a carrier includes the step of securing the carrier. The carrier is displaced into an operative position in which the integrated circuits are in physical and electrical communication with a diagnostic probe. Test signals are generated in test circuitry in electrical communication with the diagnostic probe and communicated to the integrated circuits with the diagnostic probe. The test signals are received at the test circuitry via the diagnostic probe. The test signals are made available to a controller via a communications link and an automated server and displayed with the controller.
1. A method for testing a plurality of printhead integrated circuits mounted on a carrier, the method comprising the steps of:
securing the carrier;
displacing the carrier into an operative position for contact with a diagnostic probe such that multiple printhead integrated circuits are in electrical communication with the diagnostic probe;
generating diagnostic printhead test signals in test circuitry at least in electrical communication with the diagnostic probe and communicating the printhead test signals to the printhead integrated circuits via the diagnostic probe;
receiving the printhead test signals at the test circuitry via the diagnostic probe;
making the received printhead test signals available to a controller via a communications link and an automated server; and
displaying a test status with the controller.
2. The method of claim 1 , in which the printhead integrated circuits are inkjet printheads.
3. The method of claim 1 , which includes a step of verifying an identifier of the carrier during the step of displacing the carrier into the operative position.
4. The method of claim 1 , wherein the step of securing the carrier includes clamping the carrier in a pneumatically operated clamping assembly under control of a programmable logic controller (PLC).
5. The method of claim 1 , in which the step of generating the printhead test signals is configured such that a test consisting of one of the following group is carried out on the integrated circuits: a gross Idd test, an Ipos test, a protection diode voltage threshold test, a wirebond continuity test, a leakage current test, a signal input voltage threshold test , a signal output voltages test, and a test for functional vectors.
6. The method of claim 1 , which includes a step of relaying the printhead test signals to a remote monitoring system.
7. The method of claim 6 , in which the step of relaying the printhead test signals to a remote monitoring system includes the step of relaying the test signals via an Ethernet link connected to the test circuitry.
8. The method of claim 1 , in which the steps of communicating and receiving the printhead test signals includes the step of multiplexing the signals to route the signals to and from individual dies in the integrated circuits.