Variable transconductance circuit

1. A transconductance control circuit comprising:

a square circuit comprising a trans-linear loop circuit including vertically-connected first and second MOS transistors with a gate and drain of each transistor being connected to each other, a third MOS transistor of which gate is connected to the gate of the second MOS transistor, and a fourth MOS transistor of which gate is connected to a source of the third MOS transistor, the square circuit comprising a supply means for increasing a current flowing through each of the third and fourth MOS transistors by several times and supplying a resultant current to the first and second MOS transistors, the square circuit using a drain of the second MOS transistor as a current input, and connecting one of the third and fourth MOS transistors to a first current source while outputting a current flowing through the other third or fourth MOS transistor as a current mirror output, and

the current mirror output serves as a bias current.

2. The transconductance control circuit of claim 1 , wherein the mirror ratio of the current mirror output is variable.

3. The transconductance control circuit of claim 1 , wherein the current value of the first current source is variable.

4. The transconductance control circuit of claim 1 , further comprising a variable transconductance circuit,

wherein the variable transconductance circuit comprising:

a voltage-current conversion circuit for outputting a current signal linear with an input voltage signal;

first and second MOS transistors for converting the current signal received to a square-root compressed or approximately square-root compressed voltage signal; and

third and fourth MOS transistors for converting the square-root compressed or approximately square-root compressed voltage signal to a linear current signal,

wherein transconductance is controlled by varying the bias current for the first and second MOS transistors and the bias current for the third and fourth MOS transistors.