IP Library Granted Patent US 8,625,065
Granted Patent B2
US 8,625,065 · App. 12/197,041 · Granted Jan 7, 2014

Array substrate and display panel having the same

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,625,065
App. No.
12/197,041
Granted
Jan 7, 2014
Kind
B2
Abstract

An array substrate includes a gate line, a data line, a plurality of common electrodes, a shield electrode, and a pixel electrode. The gate line is extended along a first direction, and the data line is extended along a second direction. The common electrodes are formed in a plurality of pixel areas. The common electrodes are spaced apart from each other. The shield electrode is formed below the data line and formed between the common electrodes formed in the pixel areas adjacent to each other. The pixel electrode is overlapped with the common electrodes. The pixel electrode has a plurality of openings formed thereon. Therefore, an electric field of a common electrode pattern may prevent coupling between a pixel electrode and a data line, so that a distance between the pixel electrode and the data line may be minimized, and thus an aperture ratio and light transmittance may be enhanced.

Claims (59)

1. An array substrate comprising:

a base substrate;

a gate line extended along a first direction on the base substrate;

a data line extended along a second direction crossing the first direction;

a common electrode formed in a pixel area of the base substrate;

a pixel electrode having a plurality of openings formed thereon; and

a shield electrode formed overlapping the data line and on the common electrode, and contacting the common electrode,

wherein the common electrode is overlapped by the entirety of the openings of the pixel electrode.

2. The array substrate of claim 1 , further comprising a bridge electrode electrically connecting common electrodes adjacent to each other in the second direction.

3. The array substrate of claim 2 , wherein the bridge electrode and the pixel electrode are formed from the same material.

4. The array substrate of claim 1 ,

wherein the common electrode is overlapped by a pixel electrode in another pixel area adjacent to the pixel electrode.

5. The array substrate of claim 1 , wherein a same level of voltage is applied to the shield electrode and the plurality of common electrodes.

6. The array substrate of claim 5 ,

wherein the shield electrode and the common electrodes are formed from the same material.

7. The array substrate of claim 5 ,

wherein the shield electrode partially overlaps the pixel electrode.

8. The array substrate of claim 5 ,

wherein the common electrodes being spaced apart from each other.

9. The array substrate of claim 8 ,

wherein a width of the shield electrode is larger than a gap between two adjacent common electrodes.

10. The array substrate of claim 5 , wherein the shield electrode and the gate line are formed from the same material.

11. The array substrate of claim 5 , further comprising a semiconductor layer formed between the data line and the shield electrode.

12. The array substrate of claim 5 , wherein the plurality of common electrodes comprise a common electrode pattern commonly formed in a plurality of pixel areas arranged in the first direction.

13. The array substrate of claim 12 , wherein the shield electrode is overlapped with the common electrode pattern and contacts the common electrode pattern.

14. The array substrate of claim 13 , further comprising a semiconductor layer formed between the data line and the shield electrode.

15. The array substrate of claim 5 , wherein the shield electrode and the common electrode are integrally formed.

16. The array substrate of claim 1 , further comprising a bridge electrode electrically connecting the common electrodes adjacent to each other.

17. The array substrate of claim 1 , wherein the data line is not overlapped by the pixel electrode.

18. A display panel comprising:

an array substrate including:

a base substrate;

a gate line extended along a first direction on the base substrate;

a data line extended along a second direction crossing the first direction;

a common electrode formed in a pixel area of the base substrate, a pixel electrode having a plurality of openings formed thereon; and

a shield electrode formed overlapping the data line and on the common electrode, and contacting the common electrode;

and

an opposite substrate coupled to the array substrate; and

wherein the common electrode is overlapped by the entirety of the openings of the pixel electrode.

19. The display panel of claim 18 , wherein the opposite substrate comprises a color filter formed in correspondence with each of the pixel areas.

20. The display panel of claim 18 , wherein the opposite substrate comprises a light-blocking pattern formed in an area in correspondence with the gate and data lines.

21. The display panel of claim 18 , wherein the opposite substrate comprises a light-blocking pattern formed in correspondence with the gate line, the light-blocking pattern being removed in an area in correspondence with the data line.

22. The display panel of claim 18 , wherein the array substrate further comprises a bridge electrode electrically connecting common electrodes adjacent to each other in the second direction.

23. The display panel of claim 18 ,

wherein a same level of voltage is applied to the shield electrode and the plurality of common electrodes.

24. The display panel of claim 23 , wherein the shield electrode and the common electrodes are formed from the same material.

25. The display panel of claim 23 , wherein the shield electrode is formed from an optically non-transparent and electrically conductive material.

26. The display panel of claim 23 , wherein the shield electrode and the gate line are formed from a same material.

27. The display panel of claim 23 , wherein the plurality of common electrodes comprises a common electrode pattern commonly formed in a plurality of pixel areas arranged in the first direction.

28. The display panel of claim 27 , wherein the opposite substrate comprises a light-blocking pattern formed in correspondence with the gate line, the light-blocking pattern being removed in an area in correspondence with the data line.

29. The display panel of claim 18 , wherein the data line is not overlapped by the pixel electrode.

30. An array substrate comprising:

a gate line extended along a first direction on a base substrate;

a data line extended along a second direction crossing the first direction;

a common electrode formed in a pixel area of the base substrate;

a pixel electrode overlapped with the common electrodes, the pixel electrode having a plurality of openings formed thereon; and

a shield electrode formed overlapping the data line and on the common electrode, and contacting the common electrode,

wherein the common electrode is overlapped by the entirety of the openings of the pixel electrode.

31. The array substrate of claim 30 , wherein the data line is not overlapped by the pixel electrode.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 20, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 028992/0053 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2008
From: CHANG, JONG-WOONG
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 021435/0356 →