IP Library Granted Patent US 8,094,753
Granted Patent B2
US 8,094,753 · App. 12/197,437 · Granted Jan 10, 2012

Device for estimating symbol timing or frequency offset with reliability of demodulated signal determined

Assignee: Oki Semiconductor Co., Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,094,753
App. No.
12/197,437
Granted
Jan 10, 2012
Kind
B2
Abstract

A PHS mobile phone set is provided with an offset estimation device which estimates an offset of a signal received through digital communication and makes use of the estimated offset as correction information for offset correction. The received signal is corrected in offset by use of the estimated offset and then demodulated. In the offset estimation device, the estimated offset is updated on the basis of the control signal indicating whether or not the demodulated digital signal is reliable.

Claims (28)

1. An offset estimation device which estimates an offset of a signal received through digital communication and makes use of an estimated offset as correction information for offset correction, comprising:

an estimator for estimating the correction information with respect to the received signal;

a corrector operative in response to the correction information for correcting the offset of the received signal;

a demodulator for demodulating the received signal of which the offset is corrected by said corrector; and

a determiner for examining the received signal which is demodulated by said demodulator and evaluating a reliability of the demodulated signal to output a control signal indicating whether or not the demodulated signal is reliable,

said estimator being operative in response to the control signal to update the correction information.

2. The device as claimed in claim 1 , wherein said determiner examines the demodulated received signal by detecting a unique word in the demodulated received signal to produce the control signal in accordance with whether or not the unique word is detected.

3. The device as claimed in claim 1 , wherein said determiner examines the demodulated received signal by performing CRC (Cyclic Redundancy Check) calculation of the demodulated received signal to produce the control signal in accordance with whether or not a result of the CRC calculation indicates error.

4. The device as claimed in claim 1 , wherein said estimator comprises a first estimator circuit for estimating a frequency offset of the demodulated received signal to produce first correction information indicative of the frequency offset estimated.

5. The device as claimed in claim 4 , wherein said estimator further comprises a second estimator circuit for estimating a symbol timing of the demodulated received signal to produce second correction information indicative of the symbol timing estimated.

6. The device as claimed in claim 5 , wherein said corrector includes a first corrector circuit operative in response to the first correction information for correcting the frequency offset of the received signal.

7. The device as claimed in claim 6 , wherein said corrector further includes a second corrector circuit operative in response to the second correction information for correcting timing of a symbol of the received signal.

8. A communication device operable on a basis of TDMA (Time Division Multiple Access), comprising:

an antenna for receiving, as a high frequency analog signal, radio waves transmitted from a party under communication;

a radio frequency module for amplifying the high frequency analog signal;

an analog-to-digital converter for converting the high frequency analog signal amplified by said radio frequency module to a corresponding digital signal; and

a demodulator for demodulating the digital signal to obtain information,

said demodulator comprising:

a frequency offset estimator operative in response to the digital signal for estimating a frequency offset of the digital signal with respect to a frequency in synchronization with which said demodulator performs demodulation;

an estimated frequency offset storage for storing the frequency offset estimated by said frequency offset estimator;

an offset corrector for correcting the digital signal with reference to the estimated frequency offset stored in said estimated frequency offset storage;

a demodulator circuit for demodulating the digital signal, demodulation by said demodulator circuit overlapping estimation of said frequency offset estimator such that a physical slot of the TDMA is offset corrected with reference to the estimated frequency offset which is estimated in a preceding physical slot; and

a verification circuit for verifying the digital signal demodulated by said demodulator circuit, and evaluating a reliability of the demodulated digital signal to output a verification signal indicating whether or not the demodulated digital signal is reliable,

said estimated frequency offset storage being operative in response to the verification signal to update, when the verification signal indicates that the demodulated digital signal is reliable, the estimated frequency offset in said frequency offset estimator.

9. The device as claimed in claim 8 , wherein said device is a mobile terminal serving as a personal station of a personal handy phone system communicating with a cell station on physical slots of control and traffic channels on the basis of TDMA/TDD (Time Division Multiple Access/Time Division Duplex).

10. The device as claimed in claim 9 , wherein said offset corrector receives the estimated frequency offset from said estimated frequency offset storage when the digital signal is transmitted on a first physical slot of a traffic channel such that the offset of the digital signal is corrected with reference to the estimated frequency offset which is estimated in a second physical slot of the traffic channel temporally preceding the first physical slot,

said offset corrector receiving the estimated frequency offset from said frequency offset estimator when the digital signal is transmitted on a third physical slot of the traffic channel such that the offset of the digital signal is corrected with reference to the estimated frequency offset which is estimated in the third physical slot of the traffic channel.

11. The device as claimed in claim 8 , wherein said demodulator receives the digital signal from said analog-to-digital converter through a digital filter for passing desired frequency band data of the digital signal.

Assignments (3)
CHANGE OF NAME Recorded Mar 21, 2014
From: OKI SEMICONDUCTOR CO., LTD
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 032495/0483 →
CHANGE OF NAME Recorded Mar 19, 2009
From: OKI ELECTRIC INDUSTRY CO., LTD.
To: OKI SEMICONDUCTOR CO., LTD.
Reel/Frame 022443/0893 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2008
From: HAFUKA, TAKAMITSU
To: OKI ELECTRIC INDUSTRY CO., LTD.
Reel/Frame 021435/0050 →
Priority Claims (1)
JP 2007-219755 · Aug 27, 2007 · national
Continuity (1)
Related Publication 20090060108A1 · Mar 5, 2009