IP Library Patent Application 12198191
Patent Application
App. No. 12/198,191

METHODS AND APPARATUS FOR INTEGRATED CIRCUIT HAVING INTEGRATED ENERGY STORAGE DEVICE

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Quick Facts
Patent No.
US None
App. No.
12/198,191
Abstract

Methods and apparatus for a sensor to provide a sensor output, an integrated circuit module formed at least partially on a substrate to receive the sensor output and provide an IC output signal, an output circuit having a voltage input to receive a voltage supply signal via a switch element and a signal input to receive the IC output signal and an output to provide a voltage output signal, and an integrated power storage element coupled to the voltage input of the output circuit to provide power during an interruption of the voltage supply signal, wherein the power storage element includes at least one layer generally parallel to the substrate.

Claims (46)

1 . An integrated circuit, comprising:

a sensor to provide a sensor output;

an integrated circuit module formed at least partially on a substrate to receive the sensor output and provide an IC output signal;

an output circuit having a voltage input to receive a voltage supply signal via a switch element and a signal input to receive the IC output signal and an output to provide a voltage output signal; and

an integrated power storage element coupled to the voltage input of the output circuit to provide power during an interruption of the voltage supply signal, wherein the power storage element includes at least one layer generally parallel to the substrate.

2 . The integrated circuit according to claim 1 , wherein the at least one layer includes

first and second conductive layers generally parallel to the substrate; and

a dielectric layer disposed between the first and second conductive layers such that the first and second conductive layers and the dielectric layer form a capacitor, wherein the integrated power storage element comprises the capacitor.

3 . The integrated circuit according to claim 2 , wherein the capacitor includes an interdigitated structure.

4 . The integrated circuit according to claim 1 , wherein the integrated power storage element includes a coil formed in the at least one layer to form an inductor.

5 . The integrated circuit according to claim 1 , further including a voltage regulator to receive a supply voltage and provide a regulated output voltage to the output circuit.

6 . The integrated circuit according to claim 2 , wherein a slot is formed in at least one of the first and second conductive layers proximate a magnetic field sensor for reducing eddy currents in the first and second conductive layers.

7 . The integrated circuit according to claim 6 , wherein the slot includes a first slot in the first conductive layer and a second slot in the second conductive layer, wherein the first and second slots having different geometries.

8 . The integrated circuit according to claim 6 , wherein the slot includes a first slot in the first conductive layer and a second slot in the second conductive layer, wherein the first and second slots have substantially similar geometries

9 . The integrated circuit according to claim 1 , wherein the sensor includes a Hall element.

10 . The integrated circuit according to claim 1 , wherein the sensor includes a magnetoresistance element.

11 . The integrated circuit according to claim 2 , wherein the capacitor overlaps with at least thirty percent of an area of the substrate.

12 . The integrated circuit according to claim 2 , wherein the capacitor provides a capacitance from about 50 pF to about 500 pF in about 1.0 mm square.

13 . The integrated circuit according to claim 2 , wherein the capacitance provides a capacitance from about 150 pF to about 400 pF.

14 . A method comprising:

providing a sensor to provide a sensor output;

providing an integrated circuit module formed at least partially on a substrate to receive the sensor output and provide an IC output signal;

providing an output circuit having a voltage input to receive a voltage supply signal via a switch element and a signal input to receive the IC output signal and an output to provide a voltage output signal; and

providing an integrated power storage element coupled to the voltage input of the output circuit to provide power during an interruption of the voltage supply signal, wherein the power storage element includes at least one layer generally parallel to the substrate.

15 . The method according to claim 14 , wherein the at least one layer includes

first and second conductive layers generally parallel to the substrate; and

a dielectric layer disposed between the first and second conductive layers such that the first and second conductive layers and the dielectric layer form a capacitor, wherein the integrated power storage element comprises the capacitor.

16 . The method according to claim 15 , wherein the capacitor is at least partially interdigitated.

17 . The method according to claim 14 , wherein the integrated power storage element includes a coil formed in the at least one layer to form an inductor.

18 . The method according to claim 14 , further including a voltage regulator to receive a supply voltage and provide a regulated output voltage to the output circuit.

19 . The method according to claim 15 , wherein a slot is formed in at least one of the first and second conductive layers proximate a magnetic field sensor for reducing eddy currents in the first and second conductive layers.

20 . The method according to claim 19 , wherein the slot includes a first slot in the first conductive layer and a second slot in the second conductive layer, wherein the first and second slots having different geometries.

21 . The method according to claim 19 , wherein the slot includes a first slot in the first conductive layer and a second slot in the second conductive layer, wherein the first and second slots have substantially similar geometries

22 . The method according to claim 14 , wherein the sensor includes a Hall element.

23 . The method according to claim 14 , wherein the sensor includes a magnetoresistance element.

24 . The method according to claim 15 , wherein the capacitor overlaps with at least thirty percent of an area of the substrate.

25 . The method according to claim 15 , wherein the capacitor provides a capacitance from about 150 pF to about 400 pF in about 1.0 mm square.

26 . A vehicle, comprising:

a sensor to provide a sensor output;

an integrated circuit module formed at least partially on a substrate to receive the sensor output and provide an IC output signal;

an output circuit having a voltage input to receive a voltage supply signal via a switch element and a signal input to receive the IC output signal and an output to provide a voltage output signal; and

an integrated power storage element coupled to the voltage input of the output circuit to provide power during an interruption of the voltage supply signal, wherein the power storage element includes at least one layer generally parallel to the substrate.

27 . The vehicle according to claim 26 , wherein the at least one layer includes

first and second conductive layers generally parallel to the substrate; and

a dielectric layer disposed between the first and second conductive layers such that the first and second conductive layers and the dielectic layer form a capacitor, wherein the integrated power storage element comprises the capacitor.

28 . The vehicle according to claim 26 , wherein the integrated power storage element includes a coil formed in the at least one layer to form an inductor.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2014
From: ALLEGRO MICROSYSTEMS EUROPE LIMITED
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 034171/0492 →
CONVERSION AND NAME CHANGE Recorded Apr 10, 2013
From: ALLEGRO MICROSYSTEMS, INC.
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 030426/0178 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2008
From: TAYLOR, WILLIAM P.; SCHELLER, P. KARL; FOLETTO, ANDREA
To: ALLEGRO MICROSYSTEMS, INC.
Reel/Frame 021442/0957 →