In-pixel summing of charge generated by two or more pixels having two reset transistors connected in series

1. An image sensor comprising:

(a) a plurality of pixels, wherein each pixel comprises:

(i) at least one photosensor;

(ii) at least one transfer gate connecting the photosensor to a floating diffusion;

(iii) an output transistor connected to the floating diffusion;

(iv) a first reset transistor and a second reset transistor connected in series, wherein the first reset transistor is connected between the floating diffusion and a summing node and the second reset transistor is connected to the summing node;

and

(b) a first summing transistor connecting together the summing nodes of two or more pixels.

2. The image sensor as in claim 1 further comprising a second summing transistor connecting together summing nodes of two or more pixels.

3. The image sensor as in claim 1 further comprising a row select transistor in each pixel connected to the output transistor.

4. A method for summing together charge from two or more pixels, the method comprising the steps of:

(a) providing at least one photosensor in each pixel;

(b) providing at least one transfer gate connecting the photosensor to a floating diffusion in each pixel;

(c) providing an output transistor connected to the floating diffusion in each pixel;

(d) providing a first reset transistor and a second reset transistor connected in series, wherein the first reset transistor is connected between the floating diffusion and a summing node in each pixel and the second reset transistor is connected to the summing node in each pixel;

(e) providing one or more summing transistors connecting together summing nodes of two or more pixels; and

(f) activating one or more of the summing transistors and the first reset transistor in each pixel to sum charge between two or more pixels.

5. A method for summing together charge from two or more pixels the method comprising the steps of:

(a) providing at least one photosensor in each pixel;

(b) providing at least one transfer gate connecting the photosensor to a floating diffusion in each pixel;

(c) providing an output transistor connected to the floating diffusion in each pixel;

(d) providing a first reset transistor and a second reset transistor connected in series, wherein the first reset transistor is connected between the floating diffusion and a summing node in each pixel and the second reset transistor is connected to the summing node in each pixel;

(e) providing one or more summing transistors connecting together summing nodes of two or more pixels; and

(f) deactivating one or more of the summing transistors when the floating diffusion voltage in each pixel is sampled.

6. The method as in claim 5 , wherein step (f) further comprises deactivating the first reset transistor in each pixel when the pixel floating diffusion voltage in each pixel is sampled.

7. The method as in claim 5 , further comprising activating the first and second reset transistors in each pixel at the same time to reset the floating diffusion to a power supply voltage.

8. The method as in claim 5 , wherein step (f) further comprises activating the first reset transistor in each pixel when the floating diffusion voltage in each pixel is sampled.

9. A camera comprising:

an image sensor comprising:

(a) a plurality of pixels, wherein each pixel comprises:

(i) at least one photosensor;

(ii) at least one transfer gate connecting the photosensor to a floating diffusion;

(iii) an output transistor connected to the floating diffusion;

(iv) a first reset transistor and a second reset transistor connected in series, wherein the first reset transistor is connected between the floating diffusion and a summing node and the second reset transistor is connected to the summing node;

and

(b) a first summing transistor connecting together the summing nodes of two or more pixels.

10. The camera as in claim 9 further comprising a second summing transistor connecting together summing nodes of two or more pixels.

11. The camera as in claim 9 further comprising a row select transistor in each pixel connected to the output transistor.