Class-D amplifier circuit
View Patent ↗A class-D amplifier circuit of one aspect includes a gain controller, a pulse-width modulator, an output driver, and a drive controller. The gain controller selectively amplifies an analog input signal according to a level control signal, and outputs a corresponding gain-adjusted analog input signal. The pulse-width modulator converts the gain-adjusted analog input signal into a pulse signal. The output driver includes a plurality of output driver circuits which generate an amplified pulse signal corresponding to the pulse signal output by the pulse-width modulator. The drive controller selectively disables a subset of the plurality of output driver circuits according to the level control signal.
1. A class-D amplifier circuit, comprising:
a pulse-width modulator which converts an input signal into a pulse signal;
an output driver comprising a plurality of output driver circuits which generate an amplified pulse signal corresponding to the pulse signal output by the pulse-width modulator;
a drive controller which selectively disables a subset of the plurality of output driver circuits,
wherein the input signal is a gain-adjusted audio input signal, and
wherein the class-D amplifier circuit further comprises a gain controller which receives an audio input signal and outputs the gain-adjusted audio input signal according to a volume control signal.
2. The class-D amplifier circuit of claim 1 , wherein the drive controller is responsive to a signal level of the input signal to selectively disable the subset of the plurality of output driver circuits.
3. The class-D amplifier circuit of claim 1 , wherein output driver comprises a first output driver circuit and a second output driver circuit,
wherein the first and second output driver circuits are both operational when the level of the input signal is more than a threshold value, and
wherein the first output driver circuit is operational and the second output driver circuit is disabled when the level of the input signal is less than the threshold value.
4. The class-D amplifier circuit of claim 3 , wherein the drive controller receives the input signal and compares the level of the input signal to the threshold value.
5. A class-D amplifier circuit, comprising:
a pulse-width modulator which converts an input signal into a pulse signal;
an output driver comprising a plurality of output driver circuits which generate an amplified pulse signal corresponding to the pulse signal output by the pulse-width modulator;
a drive controller which selectively disables a subset of the plurality of output driver circuits,
wherein the drive controller is responsive to a volume control signal to selectively disable the subset of the plurality of output driver circuits.
6. The class-D amplifier circuit of claim 5 , wherein the output driver further comprises a logic circuit operatively connected between the pulse-width modulator and the subset of the plurality of output driver circuits, and
wherein the logic circuit is responsive to the drive controller to selectively disable the subset of the plurality of output drive circuits.
7. The class-D amplifier circuit of claim 5 , further comprising a low-pass filter connected to the output of the output driver.
8. The class-D amplifier circuit of claim 5 , wherein the input signal is an audio input signal.
9. The class-D amplifier circuit of claim 5 , wherein the input signal is a gain-adjusted audio input signal.
10. The class-D amplifier circuit of claim 9 , further comprising a gain controller which receives an audio input signal and outputs the gain-adjusted audio input signal according to a volume control signal.
11. The class-D amplifier circuit of claim 5 , further comprising a drive signal generator operatively connected between the pulse-width modulator and the output driver.
12. A class-D amplifier circuit, comprising:
a gain controller which selectively amplifies an analog input signal according to a level control signal, and outputs a corresponding gain-adjusted analog input signal;
a pulse-width modulator which converts the gain-adjusted analog input signal into a pulse signal;
an output driver comprising a plurality of output driver circuits which generate an amplified pulse signal corresponding to the pulse signal output by the pulse-width modulator;
a drive controller which selectively disables a subset of the plurality of output driver circuits according to the level control signal.
13. The class-D amplifier circuit of claim 12 , wherein the analog input signal is an audio signal, and the level control signal is a volume control signal.
14. The class-D amplifier circuit of claim 12 , wherein the output driver further comprises a logic circuit operatively connected between the pulse-width modulator and the subset of the plurality of output driver circuits, and
wherein the logic circuit is responsive to the drive controller to selectively disable the subset of the plurality of output drive circuits.
15. The class-D amplifier circuit of claim 12 , wherein output driver comprises a first output driver circuit and a second output driver circuit,
wherein the first and second output driver circuits are both operational when the level control signal is more than a threshold value, and
wherein the first output driver circuit is operational and the second output driver circuit is disabled when the level control signal is less than the threshold value.
16. The class-D amplifier circuit of claim 15 , wherein the drive controller receives the level control signal and compares a value of the level control signal to the threshold value.
17. The class-D amplifier of claim 12 , further comprising a low-pass filter connected to the output of the output driver.
18. The class-D amplifier circuit of claim 12 , further comprising a drive signal generator operatively connected between the pulse-width modulator and the output driver.