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According to one embodiment of the invention, a circuit comprising a plurality of operational transconductance amplifiers (OTAS) is described. The first OTA has differential input and differential output. The second OTA also has differential input, where a first output of the first OTA is coupled to the first differential input of the second OTA, which is an inverting input. A second output of the first OTA is coupled to the second input of the second OTA, which is a non-inverting input. The first differential output being coupled to a first input of the first OTA and the second differential output being coupled to a second input of the first OTA for negative feedback and current biasing.
1. A circuit comprising:
a first operational transconductance amplifier comprises differential inputs and differential outputs;
a second operational transconductance amplifier comprises (i) differential inputs including a first differential input and a second differential input, and (ii) a first differential output and a second differential output, a first output of the first operational transconductance amplifier being coupled to the first differential input being an inverting input and a second output of the first operational transconductance amplifier being coupled to the second differential input being a non-inverting input, the first differential output being coupled to a first input of the first operational transconductance amplifier, and the second differential output being coupled to a second input of the first operational transconductance amplifier for negative feedback and current biasing; and
a first biasing control circuit being coupled to the differential inputs of the first operational transconductance amplifier, the first biasing control circuit provides proper biasing voltage for the first operational transconductance amplifier by maintaining an average input voltage of the first operational transconductance amplifier equal to a reference voltage.
2. The circuit according to claim 1 further comprising a second biasing control circuit being coupled to the differential inputs of the second operational transconductance amplifier, the second biasing control circuit provides proper biasing voltage for the second operational transconductance amplifier by maintaining an average input voltage of the second operational transconductance amplifier equal to the reference voltage.
3. The circuit according to claim 2 further comprising a voltage-to-current converter coupled to the differential inputs of the first operational transconductance amplifier.
4. The circuit according to claim 3 further comprising a current-to-voltage converter coupled to the differential inputs of the second operational transconductance amplifier.
5. A circuit comprising:
an input buffer;
an output buffer; and
a continuous time filter interposed between and coupled to both the input buffer and the output buffer, the continuous time filter comprises a first operational transconductance amplifier comprises differential inputs and differential outputs,
a second operational transconductance amplifier comprises (i) differential inputs including a first differential input and a second differential input, and (ii) a first differential output and a second differential output, a first output of the first operational transconductance amplifier being coupled to the first differential input being an inverting input and a second output of the first operational transconductance amplifier being coupled to the second differential input being a non-inverting input, the first differential output being coupled to a first input of the first operational transconductance amplifier and the second differential output being coupled to a second input of the first operational transconductance amplifier for negative feedback and current biasing, and
a first biasing control circuit coupled to the differential inputs of the first operational transconductance amplifier, the first biasing control circuit provides proper biasing voltage for the first operational transconductance amplifier by maintaining an average input voltage of the first operational transconductance amplifier equal to a reference voltage.
6. The circuit according to claim 5 , wherein the continuous time filter further comprises a second biasing control circuit being coupled to the differential inputs of the second operational transconductance amplifier, the second biasing control circuit provides proper biasing voltage for the second operational transconductance amplifier by maintaining an average input voltage of the second operational transconductance amplifier equal to the reference voltage.
7. The circuit according to claim 6 , wherein the continuous time filter further comprises a voltage-to-current converter coupled to the differential inputs of the first operational transconductance amplifier.
8. The circuit according to claim 7 , wherein the continuous time filter further comprises a current-to-voltage converter coupled to the differential inputs of the second operational transconductance amplifier.
9. The circuit according to claim 5 , wherein the output buffer further comprises circuitry forming a feedback loop to reduce a cutoff frequency of an amplifier implemented within the output buffer, the circuitry includes a first transistor and a second transistor connected in a reverse bias mode.