Method of manufacturing metal interconnection

1. A method of manufacturing a semiconductor device, comprising:

forming a first metal layer on a lower structural layer;

forming an interlayer metal dielectric (IMD) layer on the first metal layer, wherein a first height difference is formed in the first metal layer during forming the IMD layer, and wherein a second height difference corresponding to the first height difference is formed in the IMD layer;

forming a sacrificial oxide layer having a third height difference corresponding to the second height difference on the IMD layer, wherein a height of the sacrificial oxide layer is greater than that of the height difference in the IMD layer, and wherein a height of the third height difference is less than that of the first height difference and that of the second height difference; and

planarizing the sacrificial oxide layer and a portion of the IMD layer to substantially eliminate the second height difference in the IMD layer and provide a substantially flat IMD layer.

2. The method according to claim 1 , wherein forming the sacrificial oxide layer comprises performing a plasma enhanced chemical vapor deposition process.

3. The method according to claim 1 , wherein a height of the sacrificial oxide layer is from about five times to about ten times greater than that of the height difference in the IMD layer.

4. The method according to claim 1 , wherein planarizing the sacrificial oxide layer and a portion of the IMD layer comprises performing a chemical mechanical polishing process.

5. The method according to claim 1 , further comprising forming a via and a trench in the IMD layer.

6. The method according to claim 5 , further comprising depositing a metal on the IMD layer and in the via and the trench.

7. The method according to claim 6 , further comprising planarizing the deposited metal to remove at least a portion of the deposited metal not in the via or the trench.

8. The method according to claim 6 , further comprising forming a metal barrier layer on the IMD layer and in the via and the trench before depositing the metal.

9. The method according to claim 8 , further comprising performing a planarization process to remove at least a portion of the deposited metal not in the via or the trench and at least a portion of the metal barrier layer not in the via or the trench.

10. The method according to claim 6 , wherein a portion of the deposited metal inside the trench forms a second metal layer, and wherein a portion of the deposited metal in the via forms a contact electrically connecting the first metal layer to the second metal layer.

11. The method according to claim 1 , further comprising firming a via or a trench in the IMD layer.

12. The method according to claim 11 , further comprising depositing a metal on the IMD layer and in the via or trench.

13. The method according to claim 12 , further comprising planarizing the deposited metal to remove at least a portion of the deposited metal not in the via or trench.

14. The method according to claim 12 , further comprising forming a metal barrier layer on the IMD layer and in the via or trench before depositing the metal.

15. The method according to claim 14 , further comprising performing a planarization process to remove at least a portion of the deposited metal not in the via or the trench and at least a portion of the metal barrier layer not in the via or the trench.

16. The method according to claim 1 , further comprising forming a buffer layer on the first metal layer before forming the IMD layer.