Semiconductor storage device
View Patent ↗A voltage of a bit line connected to a memory cell is stepped up up to a power supply voltage by a precharge circuit. Before data is read from the memory cell, the voltage of the bit line is stepped down to a voltage level lower than the power supply voltage by a step-down circuit. A precharge switching element controls a connection between a high-potential-side power supply and the precharge circuit and a connection between a low-potential-side power supply and the precharge circuit. A power supply connecting circuit is provided between the precharge switching element and the high-potential-side power supply. A ground connecting circuit is provided between a connecting point at which the precharge switching element is connected to the power supply connecting circuit and the low-potential-side power supply.
1. A semiconductor storage device comprising:
a memory cell;
a bit line connected to the memory cell;
a precharge circuit for stepping up a voltage of the bit line to a power supply voltage;
a step-down circuit for stepping down the voltage of the bit line to a voltage level lower than the power supply voltage before data is read from the memory cell;
a high-potential-side power supply and a low-potential-side power supply respectively connected to the pre charge circuit; and
a precharge switching element for controlling a connection between the high-potential-side power supply and the precharge circuit and a connection between the low-potential-side power supply and the precharge circuit, wherein
a power supply connecting circuit is connected to and between the precharge switching element and the high-potential-side power supply, and
a ground connecting circuit is connected to and between a connecting point at which the precharge switching element is connected to the power supply connecting circuit and the low-potential-side power supply, and
the power supply connecting circuit and the ground connecting circuit are integrally constituted as an inverter which is turned on and off by a common precharge/step-down control signal.
2. The semiconductor storage device as claimed in claim 1 , wherein the power supply connecting circuit and the ground connecting circuit are equally connected to a group of bit lines for a plurality of columns corresponding to memory cells for a plurality of columns.