Information processing apparatus and semiconductor integrated circuit
View Patent ↗The information processing apparatus equipped with a microprocessor is provided. The information processing apparatus equipped with a microprocessor includes: an operation clock signal generator that generates a frequency-variable operation clock signal supplied to the microprocessor; and a power supply voltage generator that determines a value of a power supply voltage to be supplied to the microprocessor according to a logarithm of a frequency of the operation clock signal and generates the power supply voltage.
1. An information processing apparatus equipped with a microprocessor, comprising:
an operation clock signal generator that generates a frequency-variable operation clock signal supplied to the microprocessor; and
a power supply voltage generator that determines a value of a power supply voltage to be supplied to the microprocessor according to a logarithm of a frequency of the operation clock signal and generates the power supply voltage, wherein
the power supply voltage generator determines the value of the power supply voltage to be proportional to the logarithm of the frequency of the operation clock signal according to following equations:
K= ( E max− E min)/(log( F max)−log( F min)) (1)
When Fclk<Fmin,
Evdd=Emin (2)
When Fmin≦Fclk≦Fmax,
Evdd=K ·(log(Fclk)−log( F min))+ E min (3)
When Fmax<Fclk,
Evdd=Emax (4)
wherein Fclk is the frequency of the operation clock signal,
Fmin is a lower frequency value,
Fmax is an upper frequency value,
Evdd is the value of the power supply voltage,
Emin is a lower voltage limit value of the power supply voltage, and
Emax is an upper voltage limit value of the power supply voltage.
2. The information processing apparatus according to claim 1 , wherein
the power supply voltage generator changes the value of the power supply voltage according to a preset change curve that defines the change of the power supply voltage value according to a change in frequency of the operation clock signal.
3. The information processing apparatus according to claim 1 , wherein
the operation clock signal generator has a PLL circuit including a voltage control oscillator configured to produce a whole frequency range of the operation clock signal without range switching.
4. A semiconductor integrated circuit, comprising:
an operation clock signal generator that generates a frequency-variable operation clock signal supplied to a microprocessor; and
a power supply voltage controller that determines a value of a power supply voltage to be supplied to the microprocessor according to a logarithm of a frequency of the operation clock signal and gives an instruction including the specified value of the power supply voltage to a voltage generator to generate the power supply voltage, wherein
the power supply voltage generator determines the value of the power supply voltage to be proportional to the logarithm of the frequency of the operation clock signal according to following equations:
K =( E max− E min)/(log( F max)−log( F min)) (1)
When Fclk<Fmin,
Evdd=Emin (2)
When Fmin≦Fclk≦Fmax,
Evdd=K ·(log(Fclk)−log( F min))+ E min (3)
When Fmax<Fclk,
Evdd=Emax (4)
wherein Fclk is the frequency of the operation clock signal,
Fmin is a lower frequency value,
Fmax is an upper frequency value,
Evdd is the value of the power supply voltage,
Emin is a lower voltaqe limit value of the power supply voltage, and
Emax is an upper voltage limit value of the power supply voltage.
5. An electric motor, comprising the information processing apparatus according to claim 1 .
6. An electric motor, comprising the semiconductor integrated circuit according to claim 4 .
7. A device, comprising the motor according to claim 5 .
8. The device according to claim 7 , wherein
the device is an electronic device.
9. The device according to claim 7 , wherein
the device is a projector.
10. The device according to claim 7 , wherein
the device is a moving body.
11. The device according to claim 7 , wherein
the device is a robot.