Method of cross-correlation and continuous wave interference suppression for GPS signal and associated GPS receiver

1. A method, for use in a global positioning system (GPS) receiver, for suppressing an interference effect on a two-dimensional delay-Doppler accumulated power pattern, the method comprising:

providing a two-dimensional delay-Doppler accumulated power pattern comprising a plurality of accumulated powers corresponding to frequency and time;

for a predetermined frequency, utilizing a processor of the GPS receiver to determine a partial average power value of accumulated powers of the two-dimensional delay-Doppler accumulated power pattern over a plurality of time points by excluding accumulated power value at a maximum time point and a plurality of time points adjacent to the maximum time point; and

subtracting the partial average power value from the accumulated powers to generate a modified delay-Doppler accumulated power pattern with suppressed interference effect.

2. The method of claim 1 further comprising repeating the determining and subtracting steps for all frequencies to generate the modified two-dimensional delay-Doppler accumulated power pattern with suppressed interference effect.

3. The method of claim 1 further comprising excluding accumulated powers at the maximum time point and a group of nearest neighboring time points determined by autocorrelation peak width, from averaging.

4. The method of claim 1 , wherein the average value is obtained by calculating an arithmetic mean, a median, or a mode.

5. The method of claim 1 , wherein the average value is obtained by referencing a lookup table.

6. The method of claim 1 , wherein the predetermined frequency is a Doppler bin of the two-dimensional delay-Doppler accumulated power pattern and each time point is associated with a code bin of the two-dimensional delay-Doppler accumulated power pattern.

7. A global positioning system (GPS) receiver comprising:

an antenna;

a radio-frequency front-end coupled to the antenna;

digital signal processing circuitry coupled to the radio-frequency front-end, to output a two-dimensional delay-Doppler accumulated power pattern comprising a plurality of accumulated powers corresponding to frequency and time; and

a processor coupled to the digital signal processing circuitry, programmed to determine, for a predetermined frequency, a partial average power value of accumulated powers of the two-dimensional delay-Doppler accumulated power pattern over a plurality of time points by excluding accumulated power value at a maximum time point and a plurality of time points adjacent to the maximum time point;

wherein the processor generates a modified two-dimensional delay-Doppler accumulated power pattern with suppressed interference effect by subtracting the partial average power value from the accumulated powers.

8. The receiver of claim 7 , wherein the processor is further programmed to repeat determining and subtracting for all frequencies thereby generating the modified two-dimensional delay-Doppler accumulated power pattern with suppressed interference effect.

9. The receiver of claim 7 , wherein determining the average value is preceded by excluding accumulated powers at the maximum time point and a group of nearest neighboring time points determined by autocorrelation peak width, from averaging.

10. The receiver of claim 7 , wherein the average value is an arithmetic mean, a median, or a mode.

11. The receiver of claim 7 , wherein the average value is obtained by referencing a lookup table.

12. The receiver of claim 7 , wherein the predetermined frequency is a Doppler bin of the two-dimensional delay-Doppler accumulated power pattern and each time point is a code bin of the two-dimensional delay-Doppler accumulated power pattern.

13. The receiver of claim 7 , wherein the processor is a 32 bit processor.