IP Library Granted Patent US 8,687,981
Granted Patent B2
US 8,687,981 · App. 12/208,650 · Granted Apr 1, 2014

Method and system for split voltage domain transmitter circuits

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Quick Facts
Patent No.
US 8,687,981
App. No.
12/208,650
Granted
Apr 1, 2014
Kind
B2
Abstract

Methods and systems for split voltage domain transmitter circuits are disclosed and may include amplifying a received signal in a plurality of partial voltage domains. Each of the partial voltage domains may be offset by a DC voltage from the other partial voltage domains. A sum of the plurality of partial domains may be equal to a supply voltage of the integrated circuit. A series of diodes may be driven in differential mode via the amplified signals. An optical signal may be modulated via the diodes, which may be integrated in a Mach-Zehnder or a ring modulator. The amplified signals may be communicated to the diodes, connected in a distributed configuration, via even-mode coupled transmission lines. The partial voltage domains may be generated via stacked source follower or emitter follower circuits. The voltage domain boundary value may be at one half the supply voltage due to symmetric stacked circuits.

Claims (30)

1. A method for processing signals, the method comprising:

in an integrated circuit comprising a transmission line driver:

amplifying a received signal in a plurality of partial voltage domains;

generating said partial voltage domains in a domain splitter in said transmission line driver wherein each of said partial voltage domains is offset by a DC voltage from other of said partial voltage domains and wherein a sum of said plurality of partial domains is equal to a supply voltage of said integrated circuit; and

controlling a voltage domain boundary value between two partial voltage domains utilizing a differential amplifier that samples an output voltage of a cascade amplifier that is an input to the transmission line driver and controls a current supplying said cascade amplifier.

2. The method according to claim 1 , comprising driving a series of diodes in differential mode via said amplified signals.

3. The method according to claim 2 , comprising modulating an optical signal via said diodes.

4. The method according to claim 2 , wherein said diodes are integrated in a Mach-Zehnder modulator.

5. The method according to claim 2 , wherein said diodes are integrated in a ring modulator.

6. The method according to claim 2 , wherein said diodes are connected in a distributed configuration.

7. The method according to claim 2 , comprising communicating said amplified signals to said diodes via transmission lines.

8. The method according to claim 7 , wherein said transmission lines are even-mode coupled.

9. The method according to claim 1 , comprising generating said partial voltage domains via stacked source follower circuits.

10. The method according to claim 1 , comprising generating said partial voltage domains via stacked emitter follower circuits.

11. The method according to claim 1 , comprising generating said voltage domain boundary value of one half the supply voltage via symmetric stacked circuits.

12. A system for processing signals, the system comprising:

one or more circuits in an integrated circuit comprising a transmission line driver, said one or more circuits operable to:

amplify a received signal in a plurality of partial voltage domains;

generate said partial voltage domains in a domain splitter in said transmission line driver, wherein each of said partial voltage domains is offset by a DC voltage from other said partial voltage domains and wherein a sum of said plurality of partial domains is equal to a supply voltage of said integrated circuit; and

control a voltage domain boundary value between two partial voltage domains utilizing a differential amplifier that samples an output voltage of a cascade amplifier that is an input to the transmission line driver and controls a current supplying said cascade amplifier.

13. The system according to claim 12 , wherein said one or more circuits drives a series of diodes in differential mode via said amplified signals.

14. The system according to claim 13 , wherein said one or more circuits modulates an optical signal via said diodes.

15. The system according to claim 13 , wherein said diodes are integrated in a Mach-Zehnder modulator.

16. The system according to claim 13 , wherein said diodes are integrated in a ring modulator.

17. The system according to claim 13 , wherein said diodes are connected in a distributed configuration.

18. The system according to claim 13 , wherein said one or more circuits communicates said amplified signals to said diodes via transmission lines.

19. The system according to claim 18 , wherein said transmission lines are even-mode coupled.

20. The system according to claim 12 , wherein said one or more circuits generates said partial voltage domains via stacked source follower circuits.

21. The system according to claim 12 , wherein said one or more circuits generates said partial voltage domains via stacked emitter follower circuits.

22. The system according to claim 12 , wherein said one or more circuits generates said voltage domain boundary value of one half the supply voltage via symmetric stacked circuits.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNOR'S NAME PREVIOUSLY RECORDED AT REEL: 058979 FRAME: 0027. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 24, 2022
From: LUXTERA LLC
To: CISCO TECHNOLOGY, INC.
Reel/Frame 059496/0803 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 8, 2022
From: CISCO SYSTEMS, INC.
To: CISCO TECHNOLOGY, INC.
Reel/Frame 058979/0027 →
RELEASE OF SECURITY INTEREST Recorded Dec 24, 2020
From: SILICON VALLEY BANK
To: LUXTERA, LLC
Reel/Frame 054855/0838 →
CHANGE OF NAME Recorded Feb 6, 2020
From: LUXTERA, INC.
To: LUXTERA LLC
Reel/Frame 052019/0811 →
SECURITY INTEREST Recorded Mar 29, 2017
From: LUXTERA, INC.
To: SILICON VALLEY BANK
Reel/Frame 042109/0140 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2012
From: WELCH, BRIAN; KUCHARSKI, DANIEL
To: LUXTERA INC.
Reel/Frame 029252/0538 →
SECURITY AGREEMENT Recorded Mar 17, 2010
From: LUXTERA, INC.
To: SILICON VALLEY BANK
Reel/Frame 024091/0191 →