IP Library Granted Patent US 7,723,790
Granted Patent B2
US 7,723,790 · App. 12/208,840 · Granted May 25, 2010

Semiconductor device and method of manufacturing the same

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Quick Facts
Patent No.
US 7,723,790
App. No.
12/208,840
Granted
May 25, 2010
Kind
B2
Abstract

An isolation insulating film ( 5 ) of partial-trench type is selectively formed in an upper surface of a silicon layer ( 4 ). A power supply line ( 21 ) is formed above the isolation insulating film ( 5 ). Below the power supply line ( 21 ), a complete isolation portion ( 23 ) reaching an upper surface of an insulating film ( 3 ) is formed in the isolation insulating film ( 5 ). In other words, a semiconductor device comprises a complete-isolation insulating film which is so formed as to extend from the upper surface of the silicon layer ( 4 ) and reach the upper surface of insulating film ( 3 ) below the power supply line ( 21 ). With this structure, it is possible to obtain the semiconductor device capable of suppressing variation in potential of a body region caused by variation in potential of the power supply line.

Claims (29)

1. A semiconductor device comprising:

an SOI substrate having a structure in which a semiconductor substrate, an insulating layer and a semiconductor layer are layered in this order, the semiconductor substrate being in contact with the insulating layer;

a first insulating film arranged in a main surface of said semiconductor layer and not reaching said insulating layer;

a first MOS transistor arranged in an element formation region defined by said first insulating film in said semiconductor layer,

a second MOS transistor arranged adjacently to said first MOS transistor in said semiconductor layer, having an operating threshold voltage different from that of said first MOS transistor; and

a second insulation film arranged extending from said main surface of said semiconductor layer, reaching said insulating layer between said first MOS transistor and said second MOS transistor.

2. The semiconductor device according to claim 1 , further comprising:

an interlayer insulating film formed on said first semiconductor element and said first insulating film;

a signal line formed on said interlayer insulating film, being electrically connected to said first semiconductor element; wherein

said second insulating film formed extending from said main surface of said semiconductor layer, reaching an upper surface of said insulating layer below said signal line.

3. The semiconductor device according to claim 2 , wherein

said signal line is made of metal.

4. The semiconductor device according to claim 2 , wherein

said signal line is made of polysilicon.

5. A semiconductor device comprising:

an SOI substrate having a structure in which a semiconductor substrate, an insulating layer and a semiconductor layer are layered in this order, the semiconductor substrate being in contact with the insulating layer;

said semiconductor layer includes a first region and a second region, wherein said first region is arranged adjacently to said second region;

a first MOS transistor arranged in said first region and a second MOS transistor arranged in said second region, each of said first MOS transistor and said second MOS transistor includes a gate and a first conductivity type of source and drain region;

a first insulating film arranged in a main surface of said semiconductor layer,

said semiconductor layer between said first insulating film and said insulating layer being of a second conductivity type opposite said first conductivity type;

said first MOS transistor and said first insulating film around said first MOS transistor being arranged in said first region;

said second MOS transistor being arranged in said second region, having an operating threshold voltage different from that of said first MOS transistor; and

a second insulation film is arranged extending from said main surface of said semiconductor layer, reaching said insulating layer between said first region and said second region.

6. The semiconductor device according to claim 5 , further comprising:

an interlayer insulating film formed on said first semiconductor element and said first insulating film;

a signal line formed on said interlayer insulating film, being electrically connected to said first semiconductor element; wherein

said second insulating film is formed extending from said main surface of said semiconductor layer, reaching an upper surface of said insulating layer below said signal line.

7. The semiconductor device according to claim 6 , wherein said signal line is made of metal.

8. The semiconductor device according to claim 6 , wherein said signal line is made of polysilicon.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Sep 1, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024915/0526 →
MERGER Recorded Sep 1, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024915/0556 →