IP Library Granted Patent US 8,559,969
Granted Patent B2
US 8,559,969 · App. 12/210,763 · Granted Oct 15, 2013

Method and system for sharing a clock reference signal within an integrated mobile device

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Quick Facts
Patent No.
US 8,559,969
App. No.
12/210,763
Granted
Oct 15, 2013
Kind
B2
Abstract

A method and system of a GPS system controlling a voltage of an input signal to an oscillator, the oscillator producing a clock reference signal to the GPS system and a modem system, such that a frequency of the clock reference signal is altered to synchronize the modem system with a corresponding network while the GPS system remains in a locked state.

Claims (40)

1. A method of sharing a clock reference signal of an oscillator that is input to a global positioning system (GPS) and a modem system within an integrated mobile device, the method comprising:

receiving an input signal at the modem system;

comparing the input signal with the clock reference signal at the modem system to define a frequency error signal;

altering a signal input at the oscillator by the GPS based upon the frequency error signal from the modem system to alter a frequency of the clock reference signal to synchronize the modem system with a corresponding network; and

altering a value to be added to the altered frequency clock reference signal that is employed by the GPS, wherein the value is based on the frequency error signal.

2. A method as recited in claim 1 , further comprising communicating the frequency error signal to the GPS from the modem system.

3. A method as recited in claim 1 , wherein the corresponding network is selected from a group of networks comprising 2G, 3G, 4G, WiMax, or long term evolution (LTE).

4. A method as recited in claim 1 , further comprising measuring the frequency of the clock reference signal prior to and subsequent to altering the voltage of the signal input at the oscillator to define a difference and correlating a value of the frequency error signal to the difference.

5. A method as recited in claim 1 , wherein the locked state of the GPS has a tolerance in a range of 10 ppb to 100 ppb.

6. A system comprising:

an oscillator to generate a clock reference signal;

a modem system comprising:

a radio frequency (RF) processor to receive the clock reference signal;

an antenna to receive an input signal; and

a digital signal processor (DSP) configured to compare the input signal received by the antenna with the clock reference signal to define a frequency error signal; and

a global positioning system (GPS) comprising:

a GPS radio frequency (RF) processor to receive the clock reference signal;

a frequency compensation unit to receive the frequency error signal and alter a signal input to the oscillator based upon the frequency error signal from the modem system to alter a frequency of the clock reference signal to synchronize the modem system with a corresponding network; and

a carrier numerically controlled oscillator in communication with the frequency compensation unit to add a value to the altered frequency clock reference signal that is employed by the GPS, wherein the value is based on the frequency error signal.

7. A system as recited in claim 6 , wherein the oscillator is a temperature-compensated voltage controlled crystal oscillator.

8. A system as recited in claim 6 , wherein the oscillator is a digital controlled crystal oscillator.

9. A system as recited in claim 6 , wherein the modem system further comprises an automatic frequency control (AFC) unit to produce a digital value that represent a magnitude of the frequency error signal.

10. A system as recited in claim 6 , wherein the GPS further comprises a digital to analog converter (DAC) to convert a digital output of the frequency compensation unit to an analog signal to input to the oscillator.

11. A system as recited in claim 10 , wherein the GPS RF processor comprises the DAC.

12. A system as recited in claim 6 , wherein the GPS further comprises an antenna to receive an additional input signal.

13. A method of sharing a clock reference signal of an oscillator that is input to a global positioning system (GPS) and a modem system, both within an integrated mobile device, the method comprising:

receiving an input signal by the modem system;

comparing the input signal with the clock reference signal by the modem system, defining a frequency error signal; converting the frequency error signal to a digital value;

communicating the frequency error signal to the GPS;

altering a signal input to the oscillator by the GPS via a digital to analog convertor (DAC) based upon the frequency error signal from the modem system to alter a frequency of the clock reference signal to synchronize the modem system with a corresponding network;

converting the clock reference signal to a digital value; and

adding a value to the altered frequency clock reference signal that is employed by the GPS, wherein the value is based on the frequency error signal.

14. A method as recited in claim 13 , wherein synchronizing the modem system further comprises the corresponding network being selected from a group of networks comprising 2G, 3G, 4G, WiMax, or long term evolution (LTE).

15. A method as recited in claim 13 , further comprising measuring the frequency of the clock reference signal prior to and subsequent to altering the voltage of the signal input to the oscillator to define a difference and correlating a value of the frequency error signal to the difference.

16. A mobile device comprising:

a modem system comprising a digital signal processor (DSP) configured to compare an input signal received by the modem system with a clock reference signal generated by a single oscillator to define a frequency error signal; and

a global positioning system (GPS) comprising a frequency compensation unit to receive the frequency error signal and alter a signal input to the single oscillator based upon the frequency error signal from the modem system to alter a frequency of the clock reference signal to synchronize the modem system with a corresponding network, the single oscillator being shared between the modem system and the GPS and being controlled by the GPS, and wherein the GPS is configured to alter a value to be added to the altered frequency clock reference signal that is employed by the GPS, wherein the value is based on the frequency error signal.

17. A system as recited in claim 16 , wherein the GPS comprises a carrier numerically controlled oscillator in communication with the frequency compensation unit to add a value stored therein with the clock reference signal such that the GPS remains in a locked state.

18. A system as recited in claim 16 , wherein the modem system further comprises an automatic frequency control (AFC) unit to produce a digital value that represents a magnitude of the frequency error signal.

19. A system as recited in claim 16 , wherein the GPS further comprises a digital to analog converter (DAC) to convert a digital output of the frequency compensation unit to an analog signal to input to the single oscillator.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2022
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 061356/0001 →
CHANGE OF NAME Recorded Nov 6, 2015
From: INTEL MOBILE COMMUNICATIONS GMBH
To: INTEL DEUTSCHLAND GMBH
Reel/Frame 037057/0061 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2012
From: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
To: INTEL MOBILE COMMUNICATIONS GMBH
Reel/Frame 027556/0709 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2012
From: INFINEON TECHNOLOGIES AG
To: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
Reel/Frame 027548/0623 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2008
From: HAMMES, MARKUS; VAN WASSEN, STEFAN
To: INFINEON TECHNOLOGIES AG
Reel/Frame 021818/0797 →