Semiconductor device

1. A semiconductor device, comprising:

a board;

a plurality of first terminals provided on the board;

an interconnection layer attached to the board;

a plurality of second terminals provided on the interconnection layer and connected to the first terminals through the board;

a semiconductor chip attached to the interconnection layer; and

a plurality of third terminals provided on the semiconductor chip and connected to the second terminals,

wherein the interconnection layer is rotatable about a rotation axis perpendicular to an upper face of the interconnection layer, and

a first terminal having a specific function out of the first terminals and a third terminal having the specific function out of the third terminals are connected to each other by rotating the interconnection layer.

2. The semiconductor device of claim 1 , wherein a plurality of first wires are provided on the board,

the second terminals are provided on one of the upper face and a lower face of the interconnection layer and are in rotational symmetry about an intersection point of the rotation axis and the interconnection layer,

one ends of the respective first wires are arranged in rotational symmetry about an intersection point of the rotation axis and the board,

each of said one ends of the respective first wires is connected to and overlaps one of the second terminals, and

each of the third terminals is connected to different ones of the first terminals between before and after rotation of the interconnection layer.

3. The semiconductor device of claim 1 , further comprising a plurality of types of boards with different arrangements of the first terminals,

wherein each of the third terminals is connected to different ones of the first terminals on each of the boards between before and after rotation of the interconnection layer.

4. The semiconductor device of claim 1 , wherein the first terminals are provided on a lower face of the board and are composed of at least one first power supply terminal and at least one first signal terminal,

the second terminals are provided on the upper face of the interconnection layer and are composed of at least one second power supply terminal and at least one second signal terminal, and

a wire connecting the first signal terminal and the second signal terminal is separated from a wire connecting the first power supply terminal and the second power supply terminal.

5. The semiconductor device of claim 1 , wherein the board includes a plurality of first wires extending from the interconnection layer to the first terminals,

the interconnection layer includes a plurality of second wires extending from the semiconductor chip to the second terminals,

each of the second wires intersect some of the first wires,

the second terminals are provided at respective intersection points of the second wires and the first wires, and

at one of the intersection points of each of the second wires, one of the second terminals is connected to an associated one of the first wires.

6. The semiconductor device of claim 5 , wherein said one of the second terminals connected to said associated one of the first wires is located at a longitudinal end of an associated one of the second wires.

7. The semiconductor device of claim 1 , wherein the first terminals are provided in pairs,

the first terminals constituting each pair are electrically connected to each other, and

each of the second terminals is connected to one of each pair of the first terminals.

8. The semiconductor device of claim 1 , wherein the board includes a plurality of first wires,

one end of each of the first wires is provided on an upper face of the board and is connected to an associated one of the second terminals,

the board is rotatable about a rotation axis perpendicular to the upper face of the board, and

said one end of each of some of the first wires is located at the same position between before and after rotation of the board, whereas said one end of each of the other first wire or wires is located at different positions between before and after rotation of the board.

9. The semiconductor device of claim 1 , wherein a region where none of the second terminals is provided is present at an edge of the upper face of the interconnection layer,

conductors for connecting the first terminals and the second terminals are provided on a lower face of the interconnection layer, and

a reinforcing conductor for reinforcing the strength of the interconnection layer is provided on a portion of the lower face of the interconnection layer opposite to the region where none of the second terminals is provided.

10. The semiconductor device of claim 1 , wherein the semiconductor device has a normal mode, an evaluation mode and an analysis mode,

the interconnection layer further includes a pad to be connected to one of the first terminals, a pad fixed at an H level and a pad fixed at an L level,

the normal mode is selected when the first terminals are connected to the second terminals, and

one of the evaluation mode and the analysis mode is selected when one of pads for selecting one of the modes is connected to an associated one of the first terminals.

11. The semiconductor device of claim 1 , wherein the board is a leadframe.

12. The semiconductor device of claim 1 , further comprising a plurality of said interconnection layers and a plurality of said semiconductor chips,

wherein the interconnection layers are spaced apart from each other on an upper face of the board, and

the semiconductor chips are attached to the respective interconnection layers.

13. The semiconductor device of claim 1 , further comprising a plurality of said interconnection layers and a plurality of said semiconductor chips,

wherein the interconnection layers and the semiconductor chips are alternately laminated on an upper face of the board.