Granted Patent B2

US 8,259,944 · App. 12/214,051 · Granted Sep 4, 2012

Abstract

Claims (40)

1. A system for protection against pathological patterns in a Frame Synchronous Scrambled network communication, the system comprising:

at least one transmitter comprising:

at least one pathological pattern detector that detects one or more undesirable bit patterns in an incoming traffic stream; and

at least one bit pattern modification module that modifies the one or more undesirable bit patterns to produce a modified traffic stream;

wherein the at least one transmitter transmits the modified traffic stream;

wherein the at least one bit pattern modification module comprises:

a replacement pattern generator that generates at least one replacement bit pattern;

at least one multiplexer that replaces at least a portion of the one or more undesirable bit patterns with the at least one replacement bit pattern;

an insertion pattern generator that generates at least one insertion pattern; and

at least one multiplexer that inserts the at least one insertion bit pattern into the one or more undesirable bit patterns of the incoming traffic stream.

2. The system according to claim 1 wherein the at least one replacement bit pattern comprises at least one bit transition pattern.

3. The system according to claim 2 wherein the at least one replacement pattern is less than 5 bits.

4. The system according to claim 1 further comprising at least one receiver that receives the modified traffic stream, the at least one receiver comprising at least one replacement pattern detection module that detects the at least one replacement bit pattern in the modified traffic stream and removes a detected replacement bit pattern from the modified traffic stream.

5. The system according to claim 4 wherein the at least one replacement pattern detection module removes a replacement bit pattern if the replacement bit pattern falls within a bit pattern having no bit transitions for a predetermined number of bits.

6. The system according to claim 1 wherein the at least one replacement bit pattern comprises at least one bit transition pattern.

7. The system according to claim 1 wherein the at least one pathological pattern detector outputs a stalling signal when an undesirable bit pattern is detected to stall the incoming traffic stream.

8. The system according to claim 1 wherein the at least one pathological pattern detector detects the at least one insertion pattern in the incoming traffic stream and wherein the bit pattern modification module inserts the at least one insertion pattern adjacent the detected insertion pattern.

9. The system according to claim 1 further comprising at least one receiver that receives the modified traffic stream, the at least one receiver comprising at least one insertion pattern detection module that detects the at least one insertion bit pattern in the modified traffic stream and removes a detected insertion bit pattern from the modified traffic stream.

10. The system according to claim 1 wherein the at least one bit pattern modification module comprises:

at least one correction pattern generator that generates a correction bit pattern;

at least one correction management unit that selects to perform a replacement or insertion of the correction bit pattern; and

at least one multiplexer that performs a replacement or an insertion of the correction bit pattern into the one or more undesirable bit patterns of the incoming traffic stream dependent on a selection by the at least one correction management unit.

11. The system according to claim 1 wherein the transmitter further comprises at least one frame synchronous scrambler.

12. The system according to claim 1 wherein the pathological pattern detector dynamically defines one or more undesirable bit patterns.

13. A method for correcting pathological patterns in a Frame Synchronous Scrambled network communication, the method comprising:

receiving an incoming traffic stream, at a receiver;

detecting an undesirable bit pattern in the incoming traffic stream via a processor; and

modifying the undesirable bit pattern to produce a modified traffic stream;

wherein modifying the undesirable bit pattern comprises at least one of:

generating, by a replacement pattern generator, a bit transition pattern and replacing, by at least one multiplexer, at least a portion of the undesirable bit pattern with the bit transition pattern; and

generating, by an insertion pattern generator, a bit transition pattern and inserting, by at least one multiplexer, the bit transition pattern into the undesirable bit pattern.

14. A telecommunications system comprising:

a transmitter comprising:

a frame synchronous scrambler that scrambles an incoming traffic stream;

a pattern detector that detects one or more undesirable bit patterns in a scrambled traffic stream;

a bit pattern modification module that modifies the one or more undesirable bit patterns to produce a modified traffic stream; and

at least one receiver that receives the modified traffic stream and reverts the modified traffic stream;

wherein the at least one bit pattern modification module provides at least one of:

replaces, by a replacement pattern generator, an original undesirable bit pattern with a replacement bit pattern in the modified traffic stream and wherein the receiver reverts the replacement bit pattern to the original undesirable bit pattern; and

inserts, by an insertion pattern generator, an insertion bit pattern into the modified traffic stream and wherein the receiver removes the insertion bit pattern from the modified traffic stream.

Assignments (9)