IP Library Granted Patent US 8,519,919
Granted Patent B2
US 8,519,919 · App. 12/216,082 · Granted Aug 27, 2013

Display device and method to prevent the change of threshold voltage of the writing transistor due to the variation with age

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Quick Facts
Patent No.
US 8,519,919
App. No.
12/216,082
Granted
Aug 27, 2013
Kind
B2
Abstract

A display device includes a display portion formed by disposing pixels in matrix, in which the pixel includes: a light emitting element; a signal level holding capacitor; a writing transistor for receiving a write signal from the vertical drive circuit, and being turned ON/OFF by the write signal, thereby setting a voltage across the terminals of the signal level holding capacitor at a signal level on a signal line; and a driving transistor for driving the light emitting device; and the vertical drive circuit sets a signal level of the write signal for an entire or partial time period of a time period for which the drive for the light emitting device is not influenced in a non-emission time period for which light emission of the light emitting device is stopped at a signal level of the write signal on a shorter time period side in other time periods.

Claims (27)

1. A display device comprising

a display portion formed by disposing pixels in a matrix, a horizontal drive circuit and a vertical drive circuit, signal lines and scanning lines of said display portion being driven by said horizontal drive circuit and said vertical drive circuit, for displaying a desired image on said display portion, wherein

respective ones of said pixels includes:

a light emitting device;

a signal level holding capacitor;

a writing transistor for receiving a write signal outputted from said vertical drive circuit at a gate of said writing transistor, and performing an ON/OFF operation by said write signal, for setting a voltage across terminals of said signal level holding capacitor at a signal level of a corresponding one of said signal lines; and

a driving transistor for driving said light emitting device to emit light in accordance with the voltage across said terminals of said signal level holding capacitor, and

said write signal is set for an ON operation of said writing transistor throughout a first time period, said first time period starting at a beginning of a non-emission time period of said light emitting device and ending prior to a beginning of a plurality of correction periods occurring in said non-emission time period of said light emitting device, a sum of said plurality of correction periods being shorter than said first time period, each of said plurality of correction periods contributing to a correction for a threshold voltage of said driving transistor.

2. The display device according to claim 1 , wherein

in said pixel,

both said terminals of said signal level holding capacitor are connected to a gate and a source of said driving transistor, respectively;

for the non-emission time period,

charges accumulated in said signal level holding capacitor are discharged through said driving transistor after a potential across both said terminals of said signal level holding capacitor is set at a predetermined potential, for setting the threshold voltage of said driving transistor in said signal level holding capacitor; and

the voltage across said terminals of said signal level holding capacitor is corrected with the threshold voltage of said driving transistor by setting a voltage at the one terminal of said signal level holding capacitor at the signal level of the signal on said signal line by said writing transistor, for preventing a dispersion in an emission luminance of said light emitting device due to a dispersion in the threshold voltage of said driving transistor.

3. The display device according to claim 2 , wherein

in said pixel,

for the non-emission time period,

said driving transistor is turned ON to charge the other terminal of said signal level holding capacitor with electricity by said driving transistor after the voltage at the one terminal of said signal level holding capacitor is set at the signal level on said signal line by said writing transistor,

for preventing the dispersion in the emission luminance of said light emitting device due to a dispersion in a mobility of said driving transistor.

4. A method of driving a display device including a display portion formed by disposing pixels in a matrix, a horizontal drive circuit and a vertical drive circuit, signal lines and scanning lines of said display portion being driven by said horizontal drive circuit and said vertical drive circuit, for displaying a desired image on said display portion,

wherein respective ones of said pixels includes:

a light emitting device;

a signal level holding capacitor;

a writing transistor for receiving a write signal outputted from said vertical drive circuit at a gate of said writing transistor, and performing an ON/OFF operation by said write signal, for setting a voltage across the terminals of said signal level holding capacitor at a signal level of a signal a corresponding one of said signal lines; and

a driving transistor for driving said light emitting device to emit light in accordance with the voltage across said terminals of said signal level holding capacitor,

said driving method comprising;

setting said write signal for an ON operation of said writing transistor throughout a first time period, said first time period starting at a beginning of a non-emission time period of said light emitting device and ending prior to a beginning of a plurality of correction periods occurring in said non-emission time period of said light emitting device, a sum of said plurality of correction periods being shorter than said first time period, each of said plurality of correction periods contributing to a correction for a threshold voltage of said driving transistor.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 036106/0355 →