Method of forming an amorphous ferroelectric memory device
View Patent ↗This disclosure relates to amorphous ferroelectric memory devices and methods for forming them.
1. A method for forming a memory device comprising the steps of:
forming a substrate;
forming an amorphous ferroelectric precursor over the substrate at a temperature of about 25° C.; and
heating the amorphous ferroelectric precursor to a temperature of about 350° C. to remove organic materials from the amorphous ferroelectric precursor and to form an amorphous ferroelectric material on the substrate.
2. The method for forming a memory device of claim 1 , wherein the amorphous ferroelectric precursor is spun on the substrate.
3. The method for forming a memory device of claim 1 wherein:
the amorphous ferroelectric material comprises lead, zirconium, and titanium in a sol-gel.
4. A method for forming a memory device comprising the steps of:
forming an amorphous ferroelectric material;
vaporizing the amorphous ferroelectric material;
physically depositing the vaporized amorphous ferroelectric material over a substrate at a temperature range from 25° C. to 150° C.; and
forming the amorphous ferroelectric material around a temperature-sensitive integrated circuit (IC) capable of withstanding a temperature of about 150° C.
5. The method for forming a memory device of claim 4 wherein:
the amorphous ferroelectric material comprises lead, zirconium and titanium.
6. The method for forming a memory device of claim 1 further comprising:
disposing the amorphous ferroelectric precursor around a temperature-sensitive integrated circuit (IC) capable of withstanding a temperature of about 350° C.
7. The method for forming a memory device of claim 1 wherein:
the amorphous ferroelectric material comprises lead-zirconium-titanate (Pb(Zr 05 Ti 05 )O 3 ).
8. The method for forming a memory device of claim 4 further comprising:
forming the amorphous ferroelectric material with an alignment-independent technique that does not require a robot.
9. The method for forming a memory device of claim 4 wherein:
the substrate comprises silicon, and the amorphous ferroelectric material is layered to a thickness of about 250 nanometers of lead-zirconium-titanate.