Switch method for switching class amplifiers
View Patent ↗In accordance with one the present disclosure, systems and methods are disclosed that include transmitting a binary signal from a signal source into a switch where the switch is in series between the signal source and a first circuit element. In addition, the switch is operating substantially in a switched mode and creates a switched output signal and the switch is controlled by the binary signal. Also disclosed in this method is detecting a negative voltage in a signal from a second circuit element. In this method the first circuit element is in series between the second circuit element and the switch, and upon detecting the negative voltage from the second circuit element the first circuit element creates high impedance in the first circuit element.
1. A method, comprising:
transmitting a binary signal from a signal source into a first switch and a second switch, wherein the first switch is in series between the signal source and a first circuit element, and the second switch is in series between the signal source and a second circuit element, and wherein the first switch and second switch generate a first and second switched output signal, wherein the first and second switches are operated in an alternatively complementary fashion; and
detecting a negative voltage in a signal from a signal transforming element, and upon detecting the negative voltage from the signal transforming element the first circuit element creates a high impendance in the circuit element.
2. The method of claim 1 , wherein the binary source is a sigma-delta modulation (SDM) source.
3. The method of claim 1 , wherein the first circuit element is a diode.
4. The method of claim 1 , wherein the second circuit element is a transistor.
5. The method of claim 1 , wherein the switch is a transistor.
6. The method of claim 4 , wherein the transistor is selected from a group comprising: field-effect transistor (FET), bipolar junction transistor (BJT), and Pseudomorphic High Electron Mobility Transistors (PHEMT).
7. The method of claim 5 , wherein the signal transforming element is a transformer, wherein the transformer senses the switched output signal during periods when the first circuit element does not create a high impedance state in the first circuit element, and wherein the transformer adjusts an alternating current signal based upon the output switched signal, and wherein the transformer outputs a direct current signal.
8. The method of claim 7 , wherein the first circuit element is a transistor.
9. The method of claim 1 , wherein the switch is part of a switching class amplifier.
10. A system, comprising:
a binary signal source;
a first and second switch coupled to the binary signal source, wherein the first and second switch are controlled by the binary signal source, and wherein the first switch and second switch operate in an alternatively complementary fashion;
a first voltage controlling element, wherein the voltage controlling element is coupled to the first switch and a transformer;
a second voltage controlling element, wherein the second voltage controlling element is coupled to the second switch and the transformer; and
wherein the first voltage controlling element creates a high impedance state within the first voltage element in response to a negative signal.
11. The system of claim 10 wherein the switch is a transistor.
12. The system of claim 11 , wherein transistor is selected from a group comprising: field-effect transistor (FET), bipolar junction transistor (BJT), and Pseudomorphic High Electron Mobility Transistors (PHEMT).
13. The system of claim 10 where the voltage controlling unit is a diode.
14. The system of claim 10 , where signal source is a delta-sigma modulation (SDM) source.
15. A system, comprising:
a transformer, wherein the transformer propagates a signal;
a first transistor, wherein the first transistor is coupled to the transformer through a first signal blocker, wherein the transistor is controlled by a binary data source; and
a second transistor, wherein the second transistor is coupled to the transformer through a second signal blocker, wherein the second transistor is controlled by the binary data source, and wherein the first and second transistor are operated in an alternatively complementary fashion and the first and second signal blocker create a high impedance state upon detecting a negative signal.
16. The system of claim 15 , wherein the transistor creates an output signal.
17. The system of claim 15 wherein the transformer propagates both positive and negative signals, and wherein the signal blocker is a diode and blocks negative signals created by the transformer.
18. The system of claim 15 , wherein the signal blocker is a device that switches from a state of high resistance to low resistance.
19. The system of claim 15 , wherein the transistor is a device that switches from a state of high current to a state of low current.
20. The system of claim 15 , wherein the transistor is a switching class amplifier.