Method and apparatus for anti-islanding of distributed power generation systems
View Patent ↗A method and apparatus for anti-islanding of distributed power generation systems having an inverter comprising a phase locked loop (PLL), a phase shift generator for injecting a phase shift into the PLL during at least one sample period, and a phase error signature monitor for monitoring at least one phase error response of the PLL during the at least one sample period.
1. Apparatus for determining an islanding state of a distributed power generator, comprising:
a phase locked loop (PLL);
a phase shift generator for injecting a phase shift into the PLL during at least one sample period; and
a phase error signature monitor for monitoring at least one phase error response of the PLL during the at least one sample period and, based on the at least one phase error response, identifying the islanding state.
2. The apparatus of claim 1 , wherein the phase error signature monitor:
integrates the at least one phase error response over at least one integration period to obtain at least one integrated phase error response;
compares the at least one integrated phase error response to at least one threshold; and
flags the at least one sample period as indicative of a possible islanding state when the at least one integrated phase error response satisfies the at least one threshold.
3. The apparatus of claim 2 , wherein the phase error signature monitor declares the islanding state when a first number of the at least one sample period within a second number of the at least one sample period are flagged as indicative of the possible islanding state.
4. The apparatus of claim 3 , wherein the phase error signature monitor comprises at least one resettable integrator, a comparator, at least one sampler, a subtractor, and an islanding decision controller.
5. The apparatus of claim 4 , wherein the islanding decision controller determines when the first number of the at least one sample period within the second number of the at least one sample period are flagged as indicative of the possible islanding state.
6. The apparatus of claim 5 , wherein the second number of the at least one sample period are consecutive sample periods.
7. The apparatus of claim 6 , wherein the phase shift is of a magnitude of 50 microseconds over a single cycle of a frequency of a commercial power grid.
8. The apparatus of claim 1 , wherein the PLL, the phase shift generator, and the phase error signature monitor are within an inverter.
9. The apparatus of claim 1 , wherein the at least one phase error response comprises a first phase error response and a second phase error response, wherein the first phase error response occurs prior to an injected phase shift and the second phase error response occurs after the injected phase shift.
10. The apparatus of claim 9 , wherein the phase error signature monitor:
integrates the first phase error response over a first integration period to obtain a first integrated phase response;
integrates the second phase error response over a second integration period to obtain a second integrated phase error response;
compares a difference between the first integrated phase error response and the second integrated phase error response to a threshold; and
flags the at least one sample period as indicative of a possible islanding state when the difference satisfies the threshold.
11. A system for determining an islanding state of a distributed power generator, comprising:
a plurality of inverters, wherein each inverter of the plurality of inverters comprises a phase locked loop (PLL), a phase shift generator for injecting a phase shift into the PLL during at least one sample period, and a phase error signature monitor for monitoring at least one phase error response of the PLL during the at least one sample period and, based on the at least one phase error response, identifying the islanding state; and
a controller coupled to the plurality of inverters, wherein the controller communicates a message to the plurality of inverters that causes the phase shift generator of each of the inverters of the plurality of inverters to inject the phase shift simultaneously into the plurality of inverters.
12. The system of claim 11 , wherein the at least one phase error response comprises a first phase error response and a second phase error response, wherein the first phase error response occurs prior to an injected phase shift and the second phase error response occurs after the injected phase shift.
13. The system of claim 11 , wherein the plurality of inverters is a plurality of micro-inverters.
14. A method for determining an islanding state of a distributed power generator, comprising:
injecting a phase shift into a phase locked loop (PLL) of an inverter, wherein the phase shift is injected during at least one sample period;
integrating at least one phase error response of the PLL over at least one integration period to obtain at least one integrated phase error response;
comparing the at least one integrated phase error response to at least one threshold; and
flagging the at least one sample period as indicative of a possible islanding state when the at least one integrated phase error response satisfies the at least one threshold.
15. The method of claim 14 , further comprising declaring the islanding state when a first number of the at least one sample period within a second number of the at least one sample period are flagged as indicative of the possible islanding state.
16. The method of claim 15 , wherein the second number of the at least one sample period are consecutive sample periods.
17. The method of claim 16 , wherein the phase shift is of a magnitude of 50 microseconds over a single cycle of a frequency of a commercial power grid, wherein the commercial power grid is coupled to the inverter.
18. The method of claim 16 , further comprising communicating a message to a plurality of inverters, wherein the message causes each inverter of the plurality of inverters to inject the phase shift simultaneously.
19. The method of claim 14 , wherein the inverter is a micro-inverter.
20. The method of claim 18 , wherein the plurality of inverters are micro-inverters.
21. The method of claim 14 , wherein the integrating step comprises integrating a first phase error response over a first integration period to obtain a first integrated phase error response and a second phase error response over a second integration period to obtain a second integrated phase error response, wherein the first phase error response occurs prior to the injecting step and the second phase error response occurs after the injecting step; and wherein the at least one integrated phase response of the comparing and the flagging steps comprises a difference between the first and the second integrated phase error responses.