Gate driving circuit having improved tolerance to gate voltage ripple and display device having the same
View Patent ↗A gate driving circuit and a display device having the same, a pull-up unit pulls up a current gate signal by using a first clock signal during a first period of one frame. A pull-up driver coupled to the pull-up unit receives a carry signal from one of the previous stages to turn on the pull-up unit. A pull-up unit receives a gate signal from one of the next stages, discharges the current gate signal to an off voltage level, and turns off the pull-up unit. A holder holds the current gate signal at the voltage level. An inverter turns on/off the holder in response to a first clock signal. A ripple preventer has a source and a gate coupled in common to an output terminal of the pull-up unit and a drain coupled to an input terminal of the inverter, and includes a ripple preventing diode for preventing a ripple from being applied to the inverter.
1. A gate driving circuit including a plurality of dependently coupled stages, wherein one or more of the stages comprises:
a pull-up unit for pulling up a current gate signal in response to a first clock signal during a first period in one frame;
a pull-up driver coupled to the pull-up unit, the pull-up driver receiving a carry signal from one of a previous stage and turning on the pull-up unit;
a pull down unit for receiving a gate signal from a next stage, the pull down unit discharging the current gate signal to an off voltage level, and turning off the pull-up unit;
a holder for holding the current gate signal at the off voltage level;
an inverter for turning on or turning off the holder in response to the first clock signal; and
a ripple preventer having an output terminal coupled to an input terminal of the inverter and preventing noise from transmitting to the inverter;
wherein the ripple preventer comprises a ripple preventing diode comprised of a transistor having a source terminal and a gate terminal both directly connected to an output terminal of the pull-up unit, and a drain terminal coupled to an input terminal of the inverter.
2. The gate driving circuit of claim 1 , wherein the ripple preventer further comprises;
a ripple preventing transistor having a drain terminal coupled to the drain terminal of the ripple preventing diode, a source terminal coupled to an off voltage terminal for applying the off voltage, and a gate terminal coupled to a second clock signal terminal for applying a second clock signal having an opposite phase of the first clock signal.
3. The gate driving circuit of claim 2 , wherein
the pull-up unit comprises a first pull-up unit and an output terminal of the first pull-up unit is coupled to the current gate line.
4. The gate driving circuit of claim 3 , wherein
an output terminal of the first pull-up unit is coupled to the source terminal and the gate terminal of the ripple preventing diode.
5. The gate driving circuit of claim 3 , further comprises a carry circuit for pulling up a current carry signal by using the first clock signal during the first period and an output terminal of the carry circuit is coupled to the pull-up driver of a next stage.
6. The gate driving circuit of claim 1 , wherein
the inverter further includes:
a first inverter transistor having a drain terminal coupled to a first clock signal terminal for applying the first clock signal, a source terminal coupled to the off voltage terminal, and a gate terminal coupled to the drain terminal of the ripple preventing diode;
a second inverter transistor having a gate terminal coupled to the drain terminal of the ripple preventing diode, a source terminal coupled to the off voltage terminal, and a drain terminal coupled to a control terminal of the holder; and
a ripple preventing capacitor coupled between the gate terminal and the source terminal of the second inverter transistor.
7. A display device comprising:
a display unit for displaying an image in response to a gate signal and a data signal;
a data driver for providing the data signal to the display unit; and
a gate driving circuit including a plurality of dependently coupled stages and sequentially outputting the gate signal to the display unit, wherein
the stage of the gate driving circuit includes
a pull-up unit for pulling up a current gate signal in response to a first clock signal during a first period in one frame;
a pull-up driver coupled to the pull-up unit; the pull-up driver receiving a carry signal from one of a previous stage and turning on the pull-up unit;
a pull down unit for receiving a gate signal from a next stage, the pull down unit discharging the current gate signal to an off voltage level, and turning off the pull-up unit;
a holder for holding the current gate signal at the off voltage level;
an inverter for turning on or turning off the holder in response to the first clock signal; and
a ripple preventer having an output terminal coupled to the inverter and preventing noise from transmitting to the inverter;
wherein the ripple preventer comprises a ripple preventing diode comprised of a transistor having a source terminal and a gate terminal both directly connected to an output terminal of the pull-up unit, and a drain terminal coupled to an input terminal of the inverter.
8. The display device of claim 7 , wherein the ripple preventer further comprises;
a ripple preventing transistor having a drain terminal coupled to the drain terminal of the ripple preventing diode, a source terminal coupled to an off voltage terminal for applying the off voltage, and a gate terminal coupled to a second clock signal terminal for applying a second clock signal having an opposite phase of the first clock signal.
9. The display device of claim 8 , wherein
the pull-up unit comprises a first pull-up unit and an output terminal of the first pull-up unit is coupled to the current gate line.
10. The display device of claim 9 , wherein
an output terminal of the first pull-up unit is coupled to the source terminal and the gate terminal of the ripple preventing diode.
11. The display device of claim 9 , further comprises a carry circuit for pulling up a current carry signal by using the first clock signal during the first period and an output terminal of the carry circuit is coupled to the pull-up driver of one of next stages.
12. The display device of claim 7 , wherein the inverter further includes:
a first inverter transistor having a drain terminal coupled to a first clock signal terminal for applying the first clock signal, a source terminal coupled to the off voltage terminal, and a gate terminal coupled to the drain terminal of the ripple preventing diode;
a second inverter transistor having a gate terminal coupled to the drain terminal of the ripple preventing diode, a source terminal coupled to the off voltage terminal, and a drain terminal coupled to a control terminal of the holder; and
a ripple preventing capacitor coupled between the gate terminal and the source terminal of the second inverter transistor.