IP Library Granted Patent US 7,821,060
Granted Patent B2
US 7,821,060 · App. 12/219,197 · Granted Oct 26, 2010

Semiconductor device including trench gate transistor and method of forming the same

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Quick Facts
Patent No.
US 7,821,060
App. No.
12/219,197
Granted
Oct 26, 2010
Kind
B2
Abstract

A semiconductor device includes an active region having a groove, a gate insulating film, and a gate electrode. The gate electrode may include first and second layers. The first layer extends along the gate insulating film. The first layer is electrically conductive. The second layer extends along the first layer. The second layer is separate from the gate insulating film by the first layer.

Claims (26)

1. A semiconductor device comprising:

an active region having a groove comprising an expanded portion having a width which is greater than a width of an opening of the groove;

a gate insulating film extending along the inside wall of the groove; and

a gate electrode in the groove, the gate electrode comprising:

a first layer extending along the gate insulating film, the first layer being electrically conductive; and

a second layer extending along the first layer, the second layer being separate from the gate insulating film by the first layer, the second layer being different in thermal property from the first layer, and the second layer comprising an innermost layer of the gate electrode in the expanded portion and including a material comprising one of glass, silicon nitride and refractory metal silicide,

wherein the first layer comprises a first material, and the material of the second layer comprises one of a second material that is thermally more stable than the first material, and a third material that is thermoset at a lower temperature than a temperature at which migration or deformation of the first layer is caused, and

wherein the first material is silicon and the second material is silicon nitride.

2. The semiconductor device according to claim 1 , wherein the groove includes a portion connecting the expanded portion and the opening of the groove.

3. A semiconductor device comprising:

an active region having a groove;

a gate insulating film extending along the inside wall of the groove; and

a gate electrode in the groove, the gate electrode comprising:

a first layer extending along the gate insulating film, the first layer being electrically conductive, the first layer being free of any void adjacent to the gate insulating film; and

a second layer extending along the first layer, the second layer being separate from the gate insulating film by the first layer,

wherein the first layer comprises silicon and the second layer comprises a glass.

4. The semiconductor device according to claim 2 , wherein the second layer is free of a void.

5. The semiconductor device according to claim 3 , wherein the groove has an expanded portion that is wider than the opening of the groove.

6. A semiconductor device comprising:

an active region having a groove, the groove having an expanded portion that is wider than the opening of the groove;

a gate insulating film extending along the inside wall of the groove; and

a gate electrode in the groove, the gate electrode having a multi-layered structure in at least the expanded portion of the groove, the multi-layered structure comprising:

a first layer extending along the gate insulating film, the first layer being electrically conductive; and

a second layer extending along the first layer, the second layer being separate from the gate insulating film by the first layer, and the second layer comprising an innermost layer of the gate electrode in the expanded portion and including a material comprising one of glass, silicon nitride and refractory metal silicide,

wherein the second layer is free of a void.

7. The semiconductor device according to claim 6 , wherein the first layer comprises a first material, and the material of the second layer is thermoset at a lower temperature than a temperature at which migration or deformation of the first layer is caused.

Assignments (5)
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032895/0784 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 17, 2008
From: KITAMURA, YOSHIHIRO; MIYAZAKI, TORU
To: ELPIDA MEMORY, INC.
Reel/Frame 021299/0556 →