IP Library Granted Patent US 7,541,278
Granted Patent B2
US 7,541,278 · App. 12/219,210 · Granted Jun 2, 2009

Interconnect substrate, semiconductor device, methods of manufacturing the same, circuit board, and electronic equipment

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Quick Facts
Patent No.
US 7,541,278
App. No.
12/219,210
Granted
Jun 2, 2009
Kind
B2
Abstract

A first conductive layer is formed. An insulating layer is formed so that at least a part of the insulating layer is disposed on the first conductive layer. A second conductive layer is formed so that at least a part of the second conductive layer is disposed on the insulating layer over the first conductive layer. Each of the first and second conductive layers is formed by discharging drops of a solvent containing fine particles of a conductive material. The insulating layer is formed by discharging drops of a solvent containing fine particles of an insulating material.

Claims (44)

1. A method of manufacturing a semiconductor device comprising:

forming a first conductive layer over a semiconductor wafer on which a plurality of integrated circuits are formed so that the first conductive layer is electrically connected with electrodes of the semiconductor wafer;

forming one or more posts on the first conductive layer by discharging drops of a solvent containing fine particles of a conductive material;

forming an insulating layer so that at least a part of the insulating layer is disposed on the first conductive layer;

forming a second conductive layer so that at least a part of the second conductive layer is disposed on the insulating layer over the first conductive layer; and

cutting the semiconductor wafer,

wherein each of the first and second conductive layers is formed by discharging drops of a solvent containing fine particles of a conductive material,

wherein the insulating layer is formed by discharging drops of a solvent containing fine particles of an insulating material, and

wherein the insulating layer is formed to avoid a region in which the posts are formed.

2. The method of manufacturing a semiconductor device as defined in claim 1 ,

wherein the second conductive layer is formed so that a part of the second conductive layer is electrically connected with a part of the first conductive layer.

3. The method of manufacturing a semiconductor device as defined in claim 1 ,

wherein the insulating layer is formed on the first conductive layer and in a region adjacent to the first conductive layer.

4. The method of manufacturing a semiconductor device as defined in claim 3 , wherein

the insulating layer is formed of a plurality of layers,

a lower layer of the insulating layer is formed in a region adjacent to a region in which the first conductive layer is formed, and

an upper layer of the insulating layer is formed on the first conductive layer and the lower layer of the insulating layer.

5. The method of manufacturing a semiconductor device as defined in claim 4 ,

wherein the lower layer of the insulating layer is formed after forming the first conductive layer.

6. The method of manufacturing a semiconductor device as defined in claim 4 ,

wherein the first conductive layer is formed after forming the lower layer of the insulating layer.

7. The method of manufacturing a semiconductor device as defined in claim 1 ,

wherein the insulating layer is formed so that a height of an upper surface of the insulating layer is substantially equal to a height of an upper surface of at least one of the posts.

8. The method of manufacturing a semiconductor device as defined in claim 1 ,

wherein the second conductive layer is formed to pass over at least one of the posts.

9. The method of manufacturing a semiconductor device as defined in claim 1 ,

wherein the second conductive layer is formed to avoid at least one of the posts.

10. The method of manufacturing a semiconductor device as defined in claim 9 , further comprising:

forming a second insulating layer so that at least a part of the second insulating layer is disposed on the second conductive layer; and

forming a third conductive layer so that at least a part of the third conductive layer is disposed on the second insulating layer over the second conductive layer,

wherein the third conductive layer is formed by discharging drops of a solvent containing fine particles of a conductive material, and

wherein the second insulating layer is formed by discharging drops of a solvent containing fine particles of an insulating material.

11. The method of manufacturing a semiconductor device as defined in claim 10 , wherein

the second insulating layer is formed to avoid a region in which at least one of the posts is formed, and

the third conductive layer is formed to pass over at least one of the posts.

12. The method of manufacturing a semiconductor device as defined in claim 11 ,

wherein at least one of the posts is formed by a plurality of steps.

13. The method of manufacturing a semiconductor device as defined in claim 10 , further comprising:

forming one or more electronic components,

wherein each of a plurality of components forming one of the electronic components is formed by discharging drops of a solvent containing fine particles of a material.

14. The method of manufacturing a semiconductor device as defined in claim 13 , wherein each of the electronic components is one of a capacitor, a resistor, a diode, and a transistor.

15. The method of manufacturing a semiconductor device as defined in claim 13 , wherein at least one of the electronic components is formed on a surface on which the first conductive layer is formed.

16. The method of manufacturing a semiconductor device as defined in claim 13 , wherein at least one of the electronic components is formed on the insulating layer.

17. The method of manufacturing a semiconductor device as defined in claim 13 , wherein at least one of the electronic components is formed on the second insulating layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2019
From: SEIKO EPSON CORPORATION
To: 138 EAST LCD ADVANCEMENTS LIMITED
Reel/Frame 050265/0622 →