Light emitting display device and method of fabricating the same

1. A light emitting display device, comprising:

a light emitting diode and a thin film transistor on a substrate, the light emitting diode and the thin film transistor being electrically coupled to each other; and

a photo diode on the substrate, the photo diode including an N-type doping region, a P-type doping region, and an intrinsic region between the N-type doping region and the P-type doping region, the intrinsic region including amorphous silicon and the N-type doping region and the P-type doping region being composed of a polycrystalline silicon layer.

2. The light emitting display device as claimed in claim 1 , wherein the intrinsic region of the photo diode includes one or more of argon (Ar), hydrogen (H 2 ), nitrogen (N 2 ), and/or silane (SiH 4 ).

3. The light emitting display device as claimed in claim 1 , wherein the photo diode is spaced apart from the thin film transistor.

4. The light emitting display device as claimed in claim 3 , wherein the photo diode and the thin film transistor are co-planar along a plane parallel to a plane of the substrate.

5. The light emitting display device as claimed in claim 4 , wherein the photo diode has a horizontal structure.

6. The light emitting display device as claimed in claim 1 , wherein:

the thin film transistor includes a semiconductor layer having a source region, a drain region, and a channel region between the source and drain regions; and

the source region, the drain region, the channel region, the N-type doping region, the P-type doping region, and the intrinsic region are co-planar along the plane parallel to the plane of the substrate.

7. The light emitting display device as claimed in claim 6 , wherein one of the source region or the drain region includes N-type impurities and another of the source region or the drain region includes P-type impurities.

8. The light emitting display device as claimed in claim 1 , wherein a first dielectric layer overlaps lateral ends of the source region, the drain region, the N-typed doping region, and the P-type doping region.

9. A method for fabricating a light emitting display device, comprising:

forming a thin film transistor on a substrate,

forming a photo diode on the substrate, the photo diode including an N-type doping region, a P-type doping region, and an intrinsic region between the N-type doping region and the P-type doping region, the intrinsic region including amorphous silicon and the N-type doping region and the P-type doping region being composed of a polycrystalline silicon layer; and

forming a light emitting diode on the substrate, such that the light emitting diode and the thin film transistor are electrically coupled to each other.

10. The method as claimed in claim 9 , wherein:

the polycrystalline silicon layer is a first polycrystalline silicon layer; and

forming the photo diode and the thin film transistor on the substrate includes disposing the first polycrystalline silicon layer and a second polycrystalline silicon layer, respectively, on the substrate.

11. The method as claimed in claim 10 , wherein the first and second polycrystalline silicon layers are co-planar.

12. The method as claimed in claim 10 , wherein forming the photo diode on the substrate includes doping one side of the first polycrystalline silicon layer with N-type impurities and doping an opposing side of the first polycrystalline layer with P-type impurities such that an intrinsic region is formed between the N-type and P-type implanted impurities.

13. The method as claimed in claim 12 , wherein forming the thin film transistor on the substrate includes doping one side of the second polycrystalline silicon layer with N-type impurities and doping an opposing side of the second polycrystalline layer with P-type impurities to form source and drain regions, such that a channel region is formed between the source and drain regions.

14. The method as claimed in claim 13 , further comprising doping the intrinsic region with an impurity element, such that at least a portion of the polycrystalline silicon in the intrinsic region is converted into amorphous silicon.

15. The method as claimed in claim 14 , wherein doping the intrinsic region includes converting substantially all the polycrystalline silicon in the intrinsic region into amorphous silicon, such that the intrinsic region is substantially amorphous.

16. The method as claimed in claim 14 , wherein the impurity elements is one or more of argon (Ar), hydrogen (H 2 ), nitrogen (N 2 ), and/or silane (SiH 4 ).

17. The method as claimed in claim 14 , wherein doping the intrinsic region with an impurity element includes,

forming a photosensitive film on the photodiode; and

etching the photosensitive film to expose the intrinsic region.

18. The method as claimed in claim 9 , wherein:

forming the thin film transistor includes forming a semiconductor layer having a source region, a drain region, and a channel region between the source and drain regions; and

the source region, the drain region, the channel region, the N-type doping region, the P-type doping region, and the intrinsic region are formed co-planar along the plane parallel to the plane of the substrate.

19. The light emitting display device as claimed in claim 18 , wherein one of the source region or the drain region includes N-type impurities and another of the source region or the drain region includes P-type impurities.

20. A method for fabricating a light emitting display device, comprising:

forming a thin film transistor on a substrate,

forming a photo diode on the substrate, the photo diode including an N-type doping region, a P-type doping region, and an intrinsic region between the N-type doping region and the P-type doping region, the intrinsic region including amorphous silicon; and

forming a light emitting diode on the substrate, such that the light emitting diode and the thin film transistor are electrically coupled to each other, wherein:

forming the photo diode and the thin film transistor on the substrate includes disposing a first polycrystalline silicon layer and a second polycrystalline silicon layer, respectively, on the substrate and includes doping one side of the first polycrystalline silicon layer with N-type impurities and doping an opposing side of the first polycrystalline layer with P-type impurities, such that an intrinsic region is formed between the N-type and P-type implanted impurities; and

forming the thin film transistor on the substrate includes doping one side of the second polycrystalline silicon layer with N-type impurities and doping an opposing side of the second polycrystalline layer with P-type impurities to form source and drain regions, such

that a channel region is formed between the source and drain regions.