Manufacturing thin film transistor array panels for flat panel displays
View Patent ↗A thin film transistor array panel for a flat panel display includes a substrate, a first signal line formed on the substrate, a second signal line intersecting and insulated from the first signal line, a switching element having a first terminal connected to the first signal line, a second terminal connected to the second signal line, and a third terminal, a pixel electrode connected to the third terminal of the switching element, and first and second light blocking members extending parallel to the second signal line, each being disposed on an opposite side of and partially overlapping an respective edge of the second signal line, an interval between the first and second light blocking members being in a range of from more than 1.5 μm to less than 4 μm. The array panel prevents light leakage from the display and improves its transmittance, aperture ratio and color reproducibility.
1. A thin film transistor array panel, comprising:
a substrate;
a first signal line formed on the substrate;
a second signal line intersecting the first signal line and insulated from the first signal line;
a switching element having a first terminal connected to the first signal line, a second terminal connected to the second signal line, and a third terminal;
a pixel electrode connected to the third terminal of the switching element; and,
first and second light blocking members extending parallel to the second signal line, each member being disposed on an opposite side of and partially overlapping a corresponding edge of the second signal line,
wherein an interval between the first and second light blocking members is in a range of from more than 1.5 μm and less than 4 μm,
wherein each of the first and second light blocking members has a width of from about 2.5 μm to about 5 μm.
2. The thin film transistor array panel of claim 1 , wherein each of the first and second light blocking members has a portion that overlaps the second signal line, and wherein the width of each overlapping portion is in a range of from about 1.25 μm to about 2.5 μm.
3. The thin film transistor array panel of claim 2 , wherein each of the first and second light blocking members has a portion that does not overlap the second signal line, and wherein the width of each non-overlapping portion is in a range of from about 1.25 μm to about 2.5 μm.
4. The thin film transistor array panel of claim 3 , wherein:
the first signal line comprises a gate line having first and second stems disposed parallel to each other;
the second signal line comprises a data line; and,
the first and second light blocking members connect the first and second stems to each other.
5. The thin film transistor array panel of claim 4 , further comprising:
a first passivation layer formed on the switching element;
a color filter formed on the first passivation layer; and,
a second passivation layer formed on the color filter,
wherein the pixel electrode is disposed on the second passivation layer.
6. The thin film transistor array panel of claim 1 , wherein
the first signal line comprises a gate line having first and second stems disposed parallel to each other;
the second signal line comprises a data line; and,
the first and second light blocking members connect the first and second stems to each other.
7. The thin film transistor array panel of claim 3 , wherein the first and second light blocking members function as storage electrode lines.
8. The thin film transistor array panel of claim 1 , further comprising:
a first passivation layer formed on the switching element;
a color filter formed on the first passivation layer; and,
a second passivation layer formed on the color filter,
wherein the pixel electrode is disposed on the second passivation layer.
9. The thin film transistor array panel of claim 8 , wherein the color filer overlaps with the second signal line.