Selection of preferential pitch value for speech processing
There is provided a method of using a processing circuitry for selecting a preferential pitch lag value from a plurality of pitch lag values, including a first pitch lag value and a second pitch lag value, for coding an input speech signal. The method comprises determining a first timing relationship between a previous pitch lag value and at least one of the plurality of pitch lag values; determining a second timing relationship between the first pitch lag value and the second pitch lag value; favoring one of the first pitch lag value and the second pitch lag value based on the first timing relationship and the second timing relationship to select one of the first pitch lag value and the second pitch lag value as the preferential pitch lag value; and converting the input speech signal into an encoded speech using the preferential pitch lag value.
1 - 20 . (canceled)
21 : A method of using a processing circuitry for selecting a preferential pitch lag value from a plurality of pitch lag values, including a first pitch lag value and a second pitch lag value, for coding an input speech signal, the method comprising:
determining a first timing relationship between a previous pitch lag value and at least one of the plurality of pitch lag values;
determining a second timing relationship between the first pitch lag value and the second pitch lag value;
favoring one of the first pitch lag value and the second pitch lag value based on the first timing relationship and the second timing relationship to select one of the first pitch lag value and the second pitch lag value as the preferential pitch lag value; and
converting the input speech signal into an encoded speech using the preferential pitch lag value.
22 : The method of claim 21 , wherein selection of the one of the first pitch lag value and the second pitch lag value as the preferential pitch lag value is further selected based on a voice classification.
23 : The method of claim 22 , wherein the voice classification is based on the input speech signal.
24 : The method of claim 22 , wherein the voice classification is based on one or more of a plurality of pitch lag correlation values.
25 : The method of claim 21 further comprising determining the plurality of pitch lag values using correlation.
26 : The method of claim 21 , wherein the second pitch lag value is a multiple of the first pitch lag value.
27 : A processing circuitry for selecting a preferential pitch lag value from a plurality of pitch lag values, including a first pitch lag value and a second pitch lag value, for coding an input speech signal, the processing circuitry comprising elements configured to:
determine a first timing relationship between a previous pitch lag value and at least one of the plurality of pitch lag values;
determine a second timing relationship between the first pitch lag value and the second pitch lag value;
favor one of the first pitch lag value and the second pitch lag value based on the first timing relationship and the second timing relationship to select one of the first pitch lag value and the second pitch lag value as the preferential pitch lag value; and
convert the input speech signal into an encoded speech using the preferential pitch lag value.
28 : The processing circuitry of claim 27 , wherein selection of the one of the first pitch lag value and the second pitch lag value as the preferential pitch lag value is further selected based on a voice classification.
29 : The processing circuitry of claim 28 , wherein the voice classification is based on the input speech signal.
30 : The processing circuitry of claim 28 , wherein the voice classification is based on one or more of a plurality of pitch lag correlation values.
31 : The processing circuitry of claim 27 further comprising an element configured to determine the plurality of pitch lag values using correlation.
32 : The processing circuitry of claim 27 , wherein the second pitch lag value is a multiple of the first pitch lag value.
33 : A computer medium containing an executable code for execution by processing circuitry for selecting a preferential pitch lag value from a plurality of pitch lag values, including a first pitch lag value and a second pitch lag value, for coding an input speech signal, the computer medium comprising:
code for determining a first timing relationship between a previous pitch lag value and at least one of the plurality of pitch lag values;
code for determining a second timing relationship between the first pitch lag value and the second pitch lag value;
code for favoring one of the first pitch lag value and the second pitch lag value based on the first timing relationship and the second timing relationship to select one of the first pitch lag value and the second pitch lag value as the preferential pitch lag value; and
code for converting the input speech signal into an encoded speech using the preferential pitch lag value.
34 : The computer medium of claim 33 , wherein selection of the one of the first pitch lag value and the second pitch lag value as the preferential pitch lag value is further selected based on a voice classification.
35 : The computer medium of claim 34 , wherein the voice classification is based on the input speech signal.
36 : The computer medium of claim 34 , wherein the voice classification is based on one or more of a plurality of pitch lag correlation values.
37 : The computer medium of claim 33 further comprising code for determining the plurality of pitch lag values using correlation.
38 : The computer medium of claim 33 , wherein the second pitch lag value is a multiple of the first pitch lag value.