Composite crest factor reduction
View Patent ↗Systems and methods are provided for providing a hybrid signal having a reduced crest factor. A digital signal is generated that assumes one of a plurality of vector states at discrete sampling times, with each of the plurality of vector states having an associated phase. An analog signal is monitored to determine when a phase of the analog signal is aligned with the phase of a vector state assumed by the digital signal. A crest factor reduction is applied to the digital signal if the digital signal assumes a vector state having an associated phase aligned with the phase of the analog signal to provide a compressed digital signal. The compressed digital signal and the analog signal are combined to provide the hybrid signal. The analog signal is not altered prior to being combined with the compressed digital signal.
1. A method for providing a hybrid signal having a reduced crest factor comprising:
generating a digital signal that assumes one of a plurality of vector states at discrete sampling times, each of the plurality of vector states having an associated phase;
monitoring an analog signal to determine when a phase of the analog signal is aligned with the phase of a vector state assumed by the digital signal;
applying a crest factor reduction to the digital signal if the digital signal assumes a vector state having an associated phase aligned with the phase of the analog signal to provide a compressed digital signal; and
combining the compressed digital signal and the analog signal, the analog signal being unaltered prior to being combined with the compressed digital signal, to provide the hybrid signal.
2. A method as set forth in claim 1 , wherein the digital signal is modulated via quadrature phase shift keying.
3. A method as set forth in claim 1 , wherein the amplitude of the digital signal is reduced by a maximum amount when the digital signal assumes a vector state that is in-phase with the analog signal, reduced by a minimal amount when the digital signal assumes a vector state that is directly out of phase with the analog signal, and reduced by a variable amount, ranging inclusively from the minimum amount to the maximum amount, when the digital signal assumes a vector state that is neither in-phase nor directly out-of-phase with the analog signal.
4. A method as set forth in claim 1 , further comprising providing the hybrid signal to a soft limiter that compresses amplitude peaks associated with the hybrid signal.
5. A method as set forth in claim 1 , further comprising providing forward error correction to the digital signal, the forward error correction being provided prior to the step of reducing the amplitude of the digital signal.
6. A method as set forth in claim 5 , wherein providing forward error correction to the digital signal includes applying Trellis coding to the digital signal.
7. A method as set forth in claim 5 , wherein providing forward error correction to the digital signal includes applying Reed-Solomon encoding to the digital signal.
8. A method as set forth in claim 1 , wherein generating an analog signal comprises generating a frequency modulated analog signal.
9. A system for producing a hybrid signal having a reduced crest factor, comprising:
a digital exciter that produces a digital signal that assumes one of a plurality of vector states at discrete sampling times associated with the digital signal, each of the plurality of vector states having an associated phase;
a limiting system configured to monitor an analog signal to determine phase alignment of the analog signal relative to the vector state assumed by the digital signal and apply a crest factor reduction to the digital signal if the digital signal assumes a vector state having an associated phase aligned with the phase of the analog signal to provide a compressed digital signal; and
a signal combiner that receives the analog signal in unaltered form and the compressed digital signal and combines the analog signal and the compressed digital signal to produce the hybrid signal.
10. A system as set forth in claim 9 , wherein the digital exciter comprises a modulator configured to provide a digital signal modulated via quadrature phase shift keying.
11. A system as set forth in claim 9 , wherein the analog exciter comprises a frequency modulation (FM) analog exciter.
12. A system as set forth in claim 9 , wherein the limiting system reduces the amplitude of the digital signal by a maximum amount when the digital signal assumes a vector state that is in-phase with the analog signal, reduces the amplitude by a minimal amount when the digital signal assumes a vector state that is directly out of phase with the analog signal, and reduces the amplitude by a variable amount, ranging inclusively from the minimum amount to the maximum amount, when the digital signal assumes a vector state that is neither in-phase nor directly out-of-phase with the analog signal.
13. A system as set forth in claim 9 , further comprising a soft limiter that compresses amplitude peaks associated with the hybrid signal.
14. A system as set forth in claim 9 , wherein the digital exciter comprises a forward error correction component that is configured to provide forward error correction to the digital signal.
15. A system as set forth in claim 14 , wherein the forward error correction component is configured to apply Trellis coding to the digital signal.
16. A system as set forth in claim 14 , wherein the forward error correction component is configured to apply Reed-Solomon encoding to the digital signal.