IP Library Granted Patent US 8,022,904
Granted Patent B2
US 8,022,904 · App. 12/232,040 · Granted Sep 20, 2011

Display device, driving method of the same and electronic apparatus using the same

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Quick Facts
Patent No.
US 8,022,904
App. No.
12/232,040
Granted
Sep 20, 2011
Kind
B2
Abstract

A display device includes a pixel array section and a driving section. The pixel array section includes scanning lines arranged in rows, signal lines arranged in columns, and pixels arranged in a matrix. Each of the pixels includes at least a sampling transistor, a drive transistor, a holding capacitance, and a light-emitting device. The sampling transistor has its control terminal connected to the scanning line and its pair of current terminals connected between the signal line and the control terminal of the drive transistor. The drive transistor has one of its pair of current terminals connected to the light-emitting device and the other of its pair of current terminals connected to a power source. The holding capacitance is connected between the control and current terminals of the drive transistor.

Claims (82)

1. A display device comprising:

a pixel array section and a driving section;

the pixel array section including

scanning lines arranged in rows,

signal lines arranged in columns, and

pixels arranged in a matrix, each of the pixels being disposed at the intersection of one of the scanning lines and one of the signal lines;

each of the pixels including at least

a sampling transistor,

a drive transistor,

a holding capacitance, and

a light-emitting device, wherein

the sampling transistor has its control terminal connected to the scanning line and its pair of current terminals connected between the signal line and the control terminal of the drive transistor,

the drive transistor has one of its pair of current terminals connected to the light-emitting device and the other of its pair of current terminals connected to a power source, and

the holding capacitance is connected between the control and current terminals of the drive transistor;

the driving section including at least

a write scanner adapted to sequentially supply a control signal to each of the scanning lines for line-sequentially scanning, and

a signal selector adapted to supply a video signal to each of the signal lines;

the write scanner includes a shift register and output buffers, wherein

the shift register sequentially generates an input signal from each of its stages in synchronism with line-sequentially scanning,

each of the output buffers is connected between one of the stages of the shift register and one of the scanning lines and outputs a control signal to the scanning line in response to the input signal,

the sampling transistor turns on in response to the control signal supplied to the scanning line to sample the video signal from the signal line and write the sampled video signal to the holding capacitance,

the sampling transistor negatively feeds the current flowing from the drive transistor back to the holding capacitance during a given correction period lasting until the sampling transistor turns off in response to the control signal so as to apply the correction of the mobility of the drive transistor to the video signal written to the holding capacitance, and

the drive transistor supplies a current appropriate to the video signal level written to the holding capacitance to the light-emitting device so as to cause the light-emitting device to emit light,

wherein the shift register varies the level of the input signal at least in two steps, and

the output buffer varies the trailing edge waveform of the control signal, adapted to define the timing at which the sampling transistor turns off, in response to the variation of the level of the input signal so as to variably control the correction period according to the video signal level.

2. The display device of claim 1 , wherein

the output buffer includes an inverter, the inverter including a P-channel transistor and N-channel transistor connected in series between a power line and ground line, and

the shift register varies the level of the input signal applied to the control terminal of the N-channel transistor at least in two steps.

3. The display device of claim 1 , wherein

the shift register optimizes the trailing edge waveform of the control signal by adjusting the level of the input signal.

4. A driving method for a display device, the display device including

a pixel array section and a driving section,

the pixel array section including

scanning lines arranged in rows,

signal lines arranged in columns, and

pixels arranged in a matrix, each of the pixels being disposed at the intersection of one of the scanning lines and one of the signal lines,

each of the pixels including at least

a sampling transistor,

a drive transistor,

a holding capacitance, and

a light-emitting device, wherein

the sampling transistor has its control terminal connected to the scanning line and its pair of current terminals connected between the signal line and the control terminal of the drive transistor,

the drive transistor has one of its pair of current terminals connected to the light-emitting device and the other of its pair of current terminals connected to a power source, and

the holding capacitance is connected between the control and current terminals of the drive transistor,

the driving section including at least

a write scanner adapted to sequentially supply a control signal to each of the scanning lines for line-sequentially scanning, and

a signal selector adapted to supply a video signal to each of the signal lines,

the write scanner includes a shift register and output buffers, wherein

the shift register sequentially generates an input signal from each of its stages in synchronism with line-sequentially scanning,

each of the output buffers is connected between one of the stages of the shift register and one of the scanning lines and outputs a control signal to the scanning line in response to the input signal,

the sampling transistor turns on in response to the control signal supplied to the scanning line to sample the video signal from the signal line and write the sampled video signal to the holding capacitance,

the sampling transistor negatively feeds the current flowing from the drive transistor back to the holding capacitance during a given correction period lasting until the sampling transistor turns off in response to the control signal so as to apply the correction of the mobility of the drive transistor to the video signal written to the holding capacitance, and

the drive transistor supplies a current appropriate to the video signal level written to the holding capacitance to the light-emitting device so as to cause the light-emitting device to emit light,

the method comprising the step of:

varying the level of the input signal supplied from one of the stages of the shift register; and

allowing the output buffer to vary the trailing edge waveform of the control signal, adapted to define the timing at which the sampling transistor turns off, at least in two steps in response to the variation of the level of the input signal so as to variably control the correction period according to the video signal level.

5. Electronic apparatus comprising:

A display device including

a pixel array section and a driving section;

the pixel array section including

scanning lines arranged in rows,

signal lines arranged in columns, and

pixels arranged in a matrix, each of the pixels being disposed at the intersection of one of the scanning lines and one of the signal lines;

each of the pixels including at least

a sampling transistor,

a drive transistor,

a holding capacitance, and

a light-emitting device, wherein

the sampling transistor has its control terminal connected to the scanning line and its pair of current terminals connected between the signal line and the control terminal of the drive transistor,

the drive transistor has one of its pair of current terminals connected to the light-emitting device and the other of its pair of current terminals connected to a power source, and

the holding capacitance is connected between the control and current terminals of the drive transistor;

the driving section including at least

a write scanner adapted to sequentially supply a control signal to each of the scanning lines for line-sequentially scanning, and

a signal selector adapted to supply a video signal to each of the signal lines;

the write scanner includes a shift register and output buffers, wherein

the shift register sequentially generates an input signal from each of its stages in synchronism with line-sequentially scanning,

each of the output buffers is connected between one of the stages of the shift register and one of the scanning lines and outputs a control signal to the scanning line in response to the input signal,

the sampling transistor turns on in response to the control signal supplied to the scanning line to sample the video signal from the signal line and write the sampled video signal to the holding capacitance,

the sampling transistor negatively feeds the current flowing from the drive transistor back to the holding capacitance during a given correction period lasting until the sampling transistor turns off in response to the control signal so as to apply the correction of the mobility of the drive transistor to the video signal written to the holding capacitance, and

the drive transistor supplies a current appropriate to the video signal level written to the holding capacitance to the light-emitting device so as to cause the light-emitting device to emit light,

wherein the shift register varies the level of the input signal at least in two steps, and

the output buffer varies the trailing edge waveform of the control signal, adapted to define the timing at which the sampling transistor turns off, in response to the variation of the level of the input signal so as to variably control the correction period according to the video signal level.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 036106/0355 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2008
From: YAMASHITA, JUNICHI; UCHINO, KATSUHIDE
To: SONY CORPORATION
Reel/Frame 021571/0863 →