IP Library Granted Patent US 7,813,214
Granted Patent B2
US 7,813,214 · App. 12/236,052 · Granted Oct 12, 2010

Semiconductor memory device

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Quick Facts
Patent No.
US 7,813,214
App. No.
12/236,052
Granted
Oct 12, 2010
Kind
B2
Abstract

A reference cell outputs a reference current of a data reading current of a memory cell. A trimming data in accordance with the reference current is memorized in a non-volatile memory cell. A standard current generator outputs a standard current whose current quantity is adjusted in accordance with the trimming data. A current comparator compares the standard current to the reference current. The output of the reference current from the reference cell is adjusted through a reference cell adjuster based on a result of the comparison by the current comparator.

Claims (15)

1. A semiconductor memory device comprising:

an oscillator;

a reference clock number inputted to the semiconductor memory device from outside said semiconductor memory device,

an arbitrary period inputted to the semiconductor memory device from the outside said semiconductor device;

a counter for counting a clock number defined by the number of clock signals outputted by the oscillator during the arbitrary period; and

a clock number comparator for calculating a difference between the clock number outputted by the counter and the reference clock number,

a non-volatile memory cell for memorizing a result of the calculation by the clock number comparator as a trimming data; and

a frequency adjuster for adjusting a clock frequency of the oscillator in accordance with the trimming data.

2. The semiconductor memory device as claimed in claim 1 , wherein the oscillator sets a drive clock of a peripheral circuit of the semiconductor memory device.

3. The semiconductor memory device as claimed in claim 1 , wherein the arbitrary period is variable.

4. The semiconductor memory device as claimed in claim 1 , further comprising a data corrector for correcting the trimming data in accordance with a temperature characteristic of the oscillator.

5. The semiconductor memory device as claimed in claim 4 , wherein the data corrector corrects the trimming data in accordance with temperature characteristics of a plurality of temperature ranges of the oscillator.

6. The semiconductor memory device as claimed in claim 1 , further comprising:

a temperature detector for detecting an ambient temperature of the semiconductor memory device; and

a data corrector for correcting the trimming data read from the non-volatile memory cell in accordance with a result of the detection by the temperature detector.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2019
From: PANASONIC CORPORATION
To: NORTH PLATE SEMICONDUCTOR, LLC
Reel/Frame 048620/0757 →
LICENSE Recorded Sep 11, 2018
From: NORTH PLATE SEMICONDUCTOR, LLC
To: DIODES INCORPORATED
Reel/Frame 046843/0081 →