IP Library Granted Patent US 7,764,131
Granted Patent B1
US 7,764,131 · App. 12/236,456 · Granted Jul 27, 2010

Precision, temperature stable clock using a frequency-control circuit and dual oscillators

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Quick Facts
Patent No.
US 7,764,131
App. No.
12/236,456
Granted
Jul 27, 2010
Kind
B1
Abstract

A frequency-control circuit, which is configured to receive a first signal having a first untuned frequency from a first oscillator, and to alter one or more pulses of the first signal to tune an output frequency of an output clock signal to have an average frequency at the desired target frequency. In some embodiments, the two oscillators of intentionally different frequencies are periodically switched at a duty factor, which is dependent on an absolute temperature, to generate a calibrated, precise, and temperature-stable clock.

Claims (49)

1. An apparatus, comprising:

a first oscillator to provide a first signal having a first untuned frequency;

a second oscillator to provide a second signal having a second untuned frequency; and

a frequency-control circuit coupled to receive the first and second signals and to provide an output clock signal having an output frequency, wherein the frequency-control circuit is configured to alter one or more pulses of the first and second signals to tune the output frequency of the output clock signal to have an average frequency over time at a desired target frequency.

2. The apparatus of claim 1 , wherein the first untuned frequency is greater than the desired target frequency and the second untuned frequency is less than the desired target frequency, wherein the frequency-control circuit is configured to periodically switch between the first and second signals at a duty factor, wherein switching between the first and second signals at the duty factor tunes the output frequency of the output clock signal to have the average frequency over time at the desired target frequency.

3. The apparatus of claim 2 , wherein the frequency-control circuit comprises:

a duty-factor control circuit to receive an initial duty-factor value and to provide a control signal to control the switching between the first and second signals at the duty factor, wherein the initial value tunes the output clock signal to have the average frequency over time at the desired target frequency; and

an oscillator selection circuit to receive the control signal from the duty-factor control circuit, and the first and second signals, and to provide as the output clock signal either the first or second signals, which are periodically switched at the duty factor using the control signal.

4. The apparatus of claim 3 , further comprising a memory to store the initial duty-factor value for tuning the output frequency to an initial frequency for calibration.

5. The apparatus of claim 4 , wherein the duty factor is a fixed duty factor.

6. The apparatus of claim 4 , wherein the duty factor is a variable duty factor.

7. The apparatus of claim 4 , wherein the duty factor is dependent upon a temperature of the apparatus.

8. The apparatus of claim 1 , wherein the frequency-control circuit is configured to receive a measured temperature from a temperature sensor and to alter the one or more pulses of the first and second signals based on the measured temperature to tune the output frequency of the output clock signal to have the average frequency over time at the desired target frequency over a range of temperatures.

9. The apparatus of claim 3 , further comprising:

a memory to store a temperature profile of the apparatus;

a temperature sensor to measure a temperature of the apparatus; and

a temperature profile circuit configured to receive the temperature from the temperature sensor and the temperature profile from the memory, and to provide a control signal to the frequency-control circuit to tune the output frequency of the output clock signal to have the average frequency over a range of temperatures using the measured temperature and the temperature profile, wherein the frequency-control circuit uses the control signal to modify the duty factor to tune the output frequency of the output signal to have the average frequency over the range of temperatures.

10. The apparatus of claim 2 , wherein the first oscillator is a Microelectromechanical systems (MEMS) oscillator.

11. The apparatus of claim 2 , wherein the first oscillator is a crystal oscillator.

12. The apparatus of claim 2 , wherein the first oscillator is an inductance-capacitance oscillator.

13. The apparatus of claim 2 , wherein the first oscillator is a resistance-capacitance oscillator.

14. An apparatus, comprising:

a first oscillator to provide a first signal having a first untuned frequency;

a second oscillator to provide a second signal having a second untuned frequency; and

means for altering the first and second untuned frequencies to tune the output frequency of the output clock signal to have an average frequency over time at the desired target frequency.

15. The apparatus of claim 14 , wherein the means for altering comprises:

means for altering the first and second signals to tune the output frequency to an initial frequency; and

means for altering the first and second signals to compensate for temperature effects on the apparatus to maintain the output frequency at the average frequency over time at the desired target frequency.

16. A method, comprising:

receiving a first signal having a first untuned frequency;

receiving a second signal having a second untuned frequency; and

altering one or more pulses of the first and second signals to tune an output frequency of an output clock signal to have an average frequency over time at a desired target frequency.

17. The method of claim 16 , wherein said altering the one or more pulses of the first and second signals comprises periodically switching between the first and second signals at a duty factor to tune the output frequency of the output clock signal to have the average frequency over time at the desired target frequency.

18. The method of claim 16 , further comprising measuring a temperature, and wherein said altering one or more pulses of the first and second signals comprises altering the one or more pulses of the first and second signals to tune the output frequency of the output clock signal to have the average frequency over time at the desired target frequency at the measured temperature.

19. The method of claim 18 , wherein said altering the one or more pulses of the first and second signals comprises:

modifying the duty factor to a modified duty factor using a temperature profile stored in memory and the measured temperature; and

altering the one or more pulses, based on the modified duty factor, to tune the output frequency of the output signal to have the average frequency at the desired target frequency over the range of temperatures.

20. A method, comprising:

receiving a first untuned frequency signal and a second untuned frequency signal at a clock circuit;

measuring a first untuned frequency of the first untuned frequency signal;

measuring a second untuned frequency of the second untuned frequency signal;

calculating a required shift to tune the first and second untuned frequencies to a desired tuned frequency;

running the clock circuit to generate an output clock signal using the required shift; and

applying a dual-oscillator averaging scheme to the running clock circuit to tune an output frequency of the output clock signal to have an average frequency over time at the desired target frequency.

21. The method of claim 20 , further comprising:

characterizing a temperature profile of the clock circuit;

storing the temperature profile into a memory;

measuring a current temperature; and

compensating the running clock circuit to tune the output frequency to have the average frequency over a range of temperatures based on the current temperature and temperature profile.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2010
From: SILICON LABS SC, INC.
To: SILICON LABORATORIES INC.
Reel/Frame 025366/0466 →
CHANGE OF NAME Recorded May 4, 2010
From: SILICON CLOCKS, INC.
To: SILICON LABS SC, INC.
Reel/Frame 024369/0134 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2008
From: SETH, MANU; BRUBAKER, DAVID; MCCRAITH, ANDREW; MILLER, RICHARD STEVEN; GHADERI, MIR BAHRAM
To: SILICON CLOCKS, INC.
Reel/Frame 021580/0110 →