Semiconductor light emitting devices grown on composite substrates
View Patent ↗A plurality of III-nitride semiconductor structures, each including a light emitting layer disposed between an n-type region and a p-type region, are grown on a composite substrate. The composite substrate includes a plurality of islands of III-nitride material connected to a host by a bonding layer. The plurality of III-nitride semiconductor structures are grown on the III-nitride islands. The composite substrate may be formed such that each island of III-nitride material is at least partially relaxed. As a result, the light emitting layer of each semiconductor structure has an a-lattice constant greater than 3.19 angstroms.
1. A method comprising: growing a plurality of III-nitride semiconductor structures on a substrate, wherein: each semiconductor structure comprises a light emitting region disposed between an n-type region and a p-type region, wherein the light emitting region comprises a first quantum well, a second quantum well, and a barrier disposed between the first and second quantum wells: the substrate comprises a host, a plurality of islands of III-nitride material separated by trenches, wherein the trenches extend through an entire thickness of III-nitride material that forms the semiconductor structures, and a bonding layer disposed between the host and the plurality of islands of III-nitride material, the bonding layer comprising one of glass, borophosphorosilicate glass, SiO x , SiO 2 , SiN X , Si 3 N 4 , HfO 2 , Mo, Ti, TiN, and dielectric; and the light emitting region of each semiconductor structure has an a-lattice constant greater than 3.19 angstroms; forming a conductive material that electrically connects two of the III-nitride semiconductor structures; and after growing the plurality of III-nitride semiconductor structures on the substrate, removing the host.
2. The method of claim 1 wherein forming a conductive material comprises forming a metal layer on at least a portion of the two connected III-nitride semiconductor structures.
3. The method of claim 2 wherein the metal layer electrically connects the p-type regions of the two III-nitride semiconductor structures.
4. The method of claim 2 wherein the metal layer electrically connects the p-type region of one of the two III-nitride semiconductor structures to the n-type region of the other of the two III-nitride semiconductor structures.
5. The method of claim 1 wherein forming a conductive material comprises forming a metal layer on a mount and connecting the plurality of III-nitride semiconductor structures to the mount such that the metal layer electrically connects two III-nitride semiconductor structures.
6. The method of claim 5 wherein removing the host occurs after connecting the plurality of III-nitride semiconductor structures to the mount.
7. The method of claim 1 wherein each III-nitride semiconductor structure has a length less than 500 microns.
8. The method of claim 1 wherein each trench has a width between 5 and 50 microns.
9. The method of claim 1 wherein an a-lattice constant of the light emitting layer of each semiconductor structure as grown in the device is greater than 3.19 angstroms.
10. A structure comprising: a plurality of III-nitride semiconductor structures connected to a mount, wherein: each semiconductor structure comprises a light emitting region disposed between an n-type region and a p-type region, wherein the light emitting region in each III-nitride semiconductor structure is a continuous region that is as wide as the p-type region: wherein the light emitting region comprises a first quantum well, a second quantum well, and a barrier disposed between the first and second quantum wells: adjacent semiconductor structures are separated by trenches, wherein the trenches extend through an entire thickness of the semiconductor structure; and an a-lattice constant of the light emitting region of each semiconductor structure as grown in the device is greater than 3.19 angstroms; and a conductive material disposed between two of the semiconductor structures, wherein the conductive material electrically connects two of the III-nitride semiconductor structures.
11. The structure of claim 10 wherein the conductive material comprises a metal layer disposed on at least a portion of the two connected III-nitride semiconductor structures.
12. The structure of claim 11 wherein the metal layer electrically connects the p-type regions of the two III-nitride semiconductor structures.
13. The structure of claim 11 wherein the metal layer electrically connects the p-type region of one of the two III-nitride semiconductor structures to the n-type region of the other of the two III-nitride semiconductor structures.
14. The structure of claim 10 wherein the conductive material comprises a metal layer disposed on the mount, wherein the metal layer connects the plurality of III-nitride semiconductor structures to the mount such that the metal layer electrically connects two III-nitride semiconductor structures.
15. The structure of claim 10 wherein:
the conductive material comprises a conductive oxide disposed on the mount; and
the mount comprises a ceramic material adapted to absorb first light emitted by the light emitting layer and emit second light having a different peak wavelength than the first light.
16. The structure of claim 10 wherein each III-nitride semiconductor structure has a length less than 500 microns.
17. The structure of claim 10 wherein each trench has a width between 5 and 50 microns.
18. A structure comprising:
a plurality of III-nitride semiconductor structures connected to a mount, wherein:
each semiconductor structure comprises a light emitting layer disposed between an n-type region and a p-type region;
adjacent semiconductor structures are separated by trenches, wherein the trenches extend through an entire thickness of the semiconductor structure; and
an a-lattice constant of the light emitting layer of each semiconductor structure as grown in the device is greater than 3.19 angstroms;
a conductive material disposed between two of the semiconductor structures, wherein the conductive material electrically connects two of the III-nitride semiconductor structures;
a ceramic material adapted to absorb first light emitted by the light emitting layer and emit second light having a different peak wavelength than the first light, wherein the ceramic material is disposed on a side of the plurality of semiconductor structures opposite the mount; and
a conductive oxide disposed between the plurality of semiconductor structures and the ceramic material.