IP Library Granted Patent US 8,527,976
Granted Patent B2
US 8,527,976 · App. 12/241,340 · Granted Sep 3, 2013

System and method for generating error traces for concurrency bugs

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Quick Facts
Patent No.
US 8,527,976
App. No.
12/241,340
Granted
Sep 3, 2013
Kind
B2
Abstract

A system and method for program verification includes generating a product transaction graph for a concurrent program, which captures warnings for potential errors. The warnings are filtered to remove bogus warnings, by using constraints from synchronization primitives and invariants that are derived by performing one or more dataflow analysis methods for concurrent programs. The dataflow analysis methods are applied in order of overhead expense. Concrete execution traces are generated for remaining warnings using model checking.

Claims (20)

1. A method implemented in a computer system for verification of a concurrent program, the method comprising:

removing statically unreachable nodes using constraints due to synchronization primitives on a product control graph;

performing static program analyses on the product control graph to derive sound invariants;

further removing statically unreachable nodes using the derived invariants; and

detecting violations of correctness properties using a resulting product control graph for subsequent analysis or verification.

2. The method as recited in claim 1 , wherein removing statically unreachable nodes and performing static program analyses are iteratively repeated, until no more nodes can be removed.

3. The method as recited in claim 1 , wherein the product control graph is constructed over control states corresponding to transaction boundaries in the threads or processes of the concurrent program.

4. The method as recited in claim 1 , wherein the static program analyses include one or more of constant propagation, range analysis, octagonal analysis and polyhedral analysis for concurrent programs.

5. The method as recited in claim 4 , wherein different static program analyses are performed in order of increasing levels of precision offered by the analyses.

6. The method as recited in claim 1 , wherein the static program analysis is performed using abstract interpretation over concurrent programs.

7. The method as recited in claim 6 , wherein the abstract interpretation uses a meld operation to maintain consistency over states shared between different threads or processes of the concurrent program.

8. The method as recited in claim 1 , wherein the product control graph is constructed over control states corresponding to transaction boundaries in threads or processes of the concurrent program.

9. The method as recited in claim 1 , wherein paths in the product control graph that correspond to potential violations of correctness properties are reported as warnings.

10. The method as recited in claim 9 , where subsequent analysis or verification is performed only on program slices corresponding to the warnings.

11. The method as recited in claim 1 , wherein subsequent analysis or verification includes using model checking to generate execution traces that show violations of correctness properties.

12. The method as recited in claim 11 , wherein invariants derived by dataflow analyses are used to improve scalability of model checking via state space reduction.

13. The method of claim 1 , wherein said program verification is for detecting bugs in concurrent programs, said method comprising:

generating warnings, corresponding to potential errors, in a concurrent program;

filtering out bogus warnings by performing, via said steps of removing, performing, further removing and detecting, one or more static program analysis methods for concurrent programs wherein the static program analysis methods are applied in order of overhead expense; and

generating concrete execution traces for remaining warnings using model checking.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE 8538896 AND ADD 8583896 PREVIOUSLY RECORDED ON REEL 031998 FRAME 0667. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 30, 2017
From: NEC LABORATORIES AMERICA, INC.
To: NEC CORPORATION
Reel/Frame 042754/0703 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2014
From: NEC LABORATORIES AMERICA, INC.
To: NEC CORPORATION
Reel/Frame 031998/0667 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2008
From: KAHLON, VINEET; SANKARANARAYANAN, SRIRAM; GUPTA, AARTI
To: NEC LABORATORIES AMERICA, INC.
Reel/Frame 021857/0540 →