Method of fabricating a thin film transistor

1. A method of fabricating a thin film transistor, the method comprising:

forming a gate electrode on a substrate;

forming a semiconductor layer on the gate electrode;

forming a source electrode and a drain electrode that are spaced apart from each other on the semiconductor layer with a copper layer;

fluoridizing edges of the source electrode and the drain electrode to form copper fluoride layers by providing a fluorine-containing process gas to the edges of the source electrode and the drain; and

etching a portion of the semiconductor layer exposed between the copper fluoride layers of the source electrode and the drain electrode with a process gas different from the fluorine-containing process gas.

2. The method of claim 1 , wherein the fluorine-containing process gas comprises at least one of sulfur hexafluoride (SF6) and carbon tetrafluoride (CF4).

3. The method of claim 2 , wherein the fluorine-containing process gas comprises at least one of sulfur hexafluoride (SF6), a mixed gas of sulfur hexafluoride (SF6) and oxygen (O2), carbon tetrafluoride (CF4), and a mixed gas of carbon tetrafluoride (CF4) and oxygen (O2).

4. The method of claim 3 , wherein a mixing ratio of the sulfur hexafluoride to the oxygen in the mixed gas of the sulfur hexafluoride and the oxygen is in a range of approximately 0.1:1 to approximately 1:1, and a mixing ratio of the carbon tetrafluoride to the oxygen in the mixed gas of the carbon tetrafluoride and the oxygen is in a range of approximately 0.1:1 to approximately 1:1.

5. The method of claim 1 , wherein the copper fluoride layers comprises cupric fluoride (CuF2).

6. The method of claim 1 , wherein the etching the portion of the semiconductor layer comprises dry-etching using a chlorine-containing process gas.

7. The method of claim 1 , wherein the forming the semiconductor layer comprises:

forming a first semiconductor layer pattern comprising an intrinsic semiconductor on the gate electrode; and

forming a second semiconductor layer pattern comprising an impurity semiconductor on the first semiconductor layer pattern,

wherein the etching the portion of the semiconductor layer comprises etching the second semiconductor layer pattern.

8. The method of claim 1 , wherein the forming the semiconductor layer comprises:

forming a first semiconductor layer comprising an intrinsic semiconductor on the gate electrode; and

forming a second semiconductor layer comprising an impurity semiconductor on the first semiconductor layer, and

wherein the forming the source electrode and the drain electrode comprise:

forming a copper layer on the second semiconductor layer;

forming a first photoresist layer pattern having a first thickness and a second thickness that is thicker than the first thickness on the copper layer;

etching the copper layer using the first photoresist layer pattern as an etching mask to form a data conductive layer pattern;

providing the fluorine-containing process gas to form the copper fluoride layers on a surface of the data conductive layer pattern;

etching the first semiconductor layer and the second semiconductor layer using the first photoresist layer pattern as an etching mask to form a first semiconductor layer pattern and a second semiconductor layer pattern, respectively;

removing the first photoresist layer pattern having the first thickness to form a second photoresist layer pattern; and

etching the data conductive layer pattern using the second photoresist layer pattern as an etching mask.

9. The method of claim 8 , wherein the etching the portion of semiconductor layer comprises etching the second semiconductor layer pattern.

10. The method of claim 9 , further comprising providing the fluorine-containing process gas to form the copper fluoride layers on a surface of the source electrode and the drain electrode prior to etching the second semiconductor layer pattern.