IP Library Granted Patent US 7,917,108
Granted Patent B2
US 7,917,108 · App. 12/246,887 · Granted Mar 29, 2011

Iterative multi-stage detection technique for a diversity receiver having multiple antenna elements

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Quick Facts
Patent No.
US 7,917,108
App. No.
12/246,887
Granted
Mar 29, 2011
Kind
B2
Abstract

A system and method for processing signals are disclosed. The method may include scrambling a first composite signal comprising N orthogonal sequences to generate a set of N channel signals. A second composite signal including M orthogonal sequences may be scrambled to generate a set of M channel signals. The M orthogonal sequences may be a subset of the N orthogonal sequences. The generated set of N channel signals and the generated set of M channel signals may be combined to generate K channel signals. K multiplexed channels may include the N channel signals and the M channel signals. The N channel signals may correspond to N antenna elements, and the M channel signals may correspond to M antenna elements. Each of the N channel signals may be spread utilizing a corresponding one of the N orthogonal sequences.

Claims (57)

1. A method for processing signals, the method comprising:

scrambling a first composite signal comprising N orthogonal sequences to generate a set of N channel signals;

scrambling a second composite signal comprising M orthogonal sequences to generate a set of M channel signals, wherein said M orthogonal sequences are a subset of said N orthogonal sequences; and

combining said generated set of N channel signals and said generated set of M channel signals to generate K channel signals.

2. The method according to claim 1 , wherein K multiplexed channels comprise said N channel signals and said M channel signals.

3. The method according to claim 2 , wherein:

said N channel signals correspond to N antenna elements; and

said M channel signals correspond to M antenna elements.

4. The method according to claim 1 , comprising spreading each of said N channel signals utilizing a corresponding one of said N orthogonal sequences.

5. The method according to claim 4 , comprising overlaying a first scrambling sequence onto said spread N channel signals to form said generated set of N channel signals.

6. The method according to claim 5 , comprising spreading each of said M channel signals utilizing a corresponding one of said M orthogonal sequences.

7. The method according to claim 6 , comprising overlaying a second scrambling sequence onto said spread M channel signals to form said generated set of M channel signals.

8. The method according to claim 7 , comprising combining said overlaid spread N channel signals with said overlaid spread M channel signals to generate said K channel signals.

9. The method according to claim 1 , comprising multiplexing said generated K channel signals on to a receiver chain.

10. The method according to claim 9 , comprising downconverting said multiplexed generated K channel signals, via said receiver chain, to corresponding baseband multiplexed channel signals.

11. The method according to claim 10 , comprising ggenerating K separate signals from said downconverted baseband multiplexed channel signals.

12. The method according to claim 1 , comprising orthogonally multiplexing said generated K channel signals on to a receiver chain.

13. The method according to claim 1 , comprising cancelling interference, which is due to said generated set of N channel signals, from said generated set of M channel signals.

14. The method according to claim 1 , comprising cancelling interference, which is due to said generated set of M channel signals, from said generated set of N channel signals.

15. A system for processing signals, the system comprising:

at least one processor operable to scramble a first composite signal comprising N orthogonal sequences to generate a set of N channel signals;

said at least one processor operable to scramble a second composite signal comprising M orthogonal sequences to generate a set of M channel signals, wherein said M orthogonal sequences are a subset of said N orthogonal sequences; and

said at least one processor operable to combine said generated set of N channel signals and said generated set of M channel signals to generate K channel signals.

16. The system according to claim 15 , wherein K multiplexed channels comprise said N channel signals and said M channel signals.

17. The system according to claim 16 , wherein:

said N channel signals correspond to N antenna elements; and

said M channel signals correspond to M antenna elements.

18. The system according to claim 15 , wherein said at least one processor is operable to spread each of said N channel signals utilizing a corresponding one of said N orthogonal sequences.

19. The system according to claim 18 , wherein said at least one processor is operable to overlay a first scrambling sequence onto said spread N channel signals to form said generated set of N channel signals.

20. The system according to claim 19 , wherein said at least one processor is operable to spread each of said M channel signals utilizing a corresponding one of said M orthogonal sequences.

21. The system according to claim 20 , wherein said at least one processor is operable to overlay a second scrambling sequence onto said spread M channel signals to form said generated set of M channel signals.

22. The system according to claim 1 , wherein said at least one processor is operable to combine said overlaid spread N channel signals with said overlaid spread M channel signals to generate said K channel signals.

23. The system according to claim 15 , wherein said at least one processor is operable to multiplex said generated K channel signals on to a receiver chain.

24. The system according to claim 23 , wherein said at least one processor is operable to downconvert said multiplexed generated K channel signals, via said receiver chain, to corresponding baseband multiplexed channel signals.

25. The system according to claim 24 , wherein said at least one processor is operable to generate K separate signals from said downconverted baseband multiplexed channel signals.

26. The system according to claim 15 , wherein said at least one processor is operable to orthogonally multiplex said generated K channel signals on to a receiver chain.

27. The system according to claim 15 , wherein said at least one processor is operable to cancel interference, which is due to said generated set of N channel signals, from said generated set of M channel signals.

28. The system according to claim 15 , wherein said at least one processor is operable to cancel interference, which is due to said generated set of M channel signals, from said generated set of N channel signals.

29. A system for processing signals, the system comprising:

one or more circuits operable to scramble a first composite signal comprising N orthogonal sequences to generate a set of N channel signals;

said one or more circuits operable to scramble a second composite signal comprising M orthogonal sequences to generate a set of M channel signals, wherein said M orthogonal sequences are a subset of said N orthogonal sequences; and

said one or more circuits operable to combine said generated set of N channel signals and said generated set of M channel signals to generate K channel signals.

30. The system according to claim 29 , wherein K multiplexed channels comprise said N channel signals and said M channel signals.

31. The system according to claim 30 , wherein:

said N channel signals correspond to N antenna elements; and

said M channel signals correspond to M antenna elements.

32. The system according to claim 29 , wherein said one or more circuits is operable to spread each of said N channel signals utilizing a corresponding one of said N orthogonal sequences.

33. The system according to claim 32 , wherein said one or more circuits is operable to overlay a first scrambling sequence onto said spread N channel signals to form said generated set of N channel signals.

34. The system according to claim 33 , wherein said one or more circuits is operable to spread each of said M channel signals utilizing a corresponding one of said M orthogonal sequences.

35. The system according to claim 34 , wherein said one or more circuits is operable to overlay a second scrambling sequence onto said spread M channel signals to form said generated set of M channel signals.

36. The system according to claim 35 , wherein said one or more circuits is operable to combine said overlaid spread N channel signals with said overlaid spread M channel signals to generate said K channel signals.

37. The system according to claim 29 , wherein said one or more circuits is operable to multiplex said generated K channel signals on to a receiver chain.

38. The system according to claim 37 , wherein said one or more circuits is operable to downconvert said multiplexed generated K channel signals, via said receiver chain, to corresponding baseband multiplexed channel signals.

39. The system according to claim 38 , wherein said one or more circuits is operable to generate K separate signals from said downconverted baseband multiplexed channel signals.

40. The system according to claim 29 , wherein said one or more circuits is operable to orthogonally multiplex said generated K channel signals on to a receiver chain.

41. The system according to claim 29 , wherein said one or more circuits is operable to cancel interference, which is due to said generated set of N channel signals, from said generated set of M channel signals.

42. The system according to claim 29 , wherein said one or more circuits is operable to cancel interference, which is due to said generated set of M channel signals, from said generated set of N channel signals.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE PROPERTY NUMBERS PREVIOUSLY RECORDED AT REEL: 47630 FRAME: 344. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 21, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0267 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 9/5/2018 PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0687. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0344 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
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TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →