IP Library Granted Patent US 8,431,831
Granted Patent B2
US 8,431,831 · App. 12/247,577 · Granted Apr 30, 2013

Bond strength and interconnection in a via

Inventors: Michael Francis Sweeney (Portland, OR); Jorge Eduardo Martinez-Vargas, Jr. (San Francisco, CA); Michael Clifford Freda (Morgan Hill, CA)
Assignee: Oracle America, Inc.
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Quick Facts
Patent No.
US 8,431,831
App. No.
12/247,577
Granted
Apr 30, 2013
Kind
B2
Abstract

A via is provided on a printed circuit board with at least one additional depression encompassing the via, such that the via passes through a portion of the depression. Solder can pool in the depression, allowing for a stronger mechanical bond and eliminating many issues with respect to a lack of coplanarity between a lead and the printed circuit board. The depression can be provided with plugged and unplugged vias, and improves the mountings associated with both.

Claims (12)

1. A via comprising: a first hole having a first diameter centered about an axis and passing at least partially through a printed circuit board to a first depth; and a first depression, arranged such that the first hole passes through a portion of the first depression, wherein the first depression extends to a second depth that is less than the first depth, wherein the first depression further extends to at least some depth into a substrate of the printed circuit board, wherein the first hole is plugged and wherein the first depression remains unplugged, wherein the first depression is arranged on a first side of the printed circuit board, and wherein the first hole passes through a second, opposite side of the printed circuit board, further including: a second depression, arranged on the second side of the printed circuit board, such that the first hole passes through a portion of the second depression, wherein at least some portion of the first hole is arranged between the first depression and the second depression, wherein the second depression extends to at least some depth into a substrate of the printed circuit board, and wherein the second depression remains unplugged.

2. The via of claim 1 , wherein the first depression further comprises a second hole having a second diameter greater than the first diameter.

3. The via of claim 1 , wherein the first depression has a non-cylindrical shape.

4. The via of claim 2 , wherein the first and second holes are cylindrically shaped.

5. A method of creating a via in a printed circuit board, the printed circuit board including at least one first hole about a first axis through a first surface of the printed circuit board, the first hole extending to a first depth, the method comprising: cutting a first depression into the first surface of the printed circuit board such that the first hole passes through a portion of the first depression, the first depression extending to a second depth that is less than the first depth and extending at least some depth into a substrate of the printed circuit board, wherein the first hole is plugged and wherein the first depression remains unplugged, cutting a second depression in a second surface of the printed circuit board opposite the first surface such that the first hole passes through a portion of the second depression, at such that at least a portion of the first hole remains between the first depression and the second depression, the second depression extending at least some depth into a substrate of the printed circuit board, and wherein the second depression remains unplugged.

6. The method of claim 5 , wherein the cutting a first depression further comprises cutting a second hole, wherein the second hole has a diameter greater than the first hole.

7. A printed circuit board having one or more vias provided thereto, wherein the vias comprise: a first hole having a first diameter centered about an axis and passing at least partially through the printed circuit board to a first depth; a first depression, arranged such that the first hole passes through a portion of the first depression, wherein the first depression extends to a second depth that is less than the first depth, wherein the first depression further extends to at least some depth into a substrate of the printed circuit board; and

a second depression, arranged on the second side of the printed circuit board, such that the first hole passes through a portion of the second depression, wherein at least some portion of the first hole is arranged between the first depression and the second depression, wherein the second depression further extends to at least some depth into a substrate of the printed circuit board, wherein the first hole is plugged and the first and second depression remain unplugged.

8. The printed circuit board of claim 7 , wherein the first depression further comprises a second hole having a second diameter greater than the first diameter.

9. The printed circuit board of claim 7 , wherein the first depression has a non-cylindrical shape.

10. The printed circuit board of claim 8 , wherein the first and second holes are cylindrically shaped.

11. The via of claim 1 , further comprising a plating coating both the first hole, the first depression, and the second depression, wherein the plating leaves at least some portion of the first hole, the first depression and the second depression unfilled and the plating further creates a complete layer between the substrate and the unfilled portions of the first hole, first depression and second depression.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Dec 16, 2015
From: ORACLE USA, INC.; SUN MICROSYSTEMS, INC.; ORACLE AMERICA, INC.
To: ORACLE AMERICA, INC.
Reel/Frame 037311/0195 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 8, 2008
From: SWEENEY, MICHAEL FRANCIS; MARTINEZ-VARGAS,JR., JORGE EDUARDO; FREDA, MICHAEL CLIFFORD
To: SUN MICROSYSTEMS, INC.
Reel/Frame 021648/0742 →
Continuity (1)
Related Publication 20100084178A1 · Apr 8, 2010