Array substrate of liquid crystal display and method of manufacturing the array substrate
View Patent ↗An array substrate of a liquid crystal display (LCD) device and a method of manufacturing the array substrate area disclosed. An array substrate of an LCD device includes an insulation substrate, a gate line, a data line, a thin film transistor connected to the gate line and the data line, a common electrode disposed at a pixel area, a pixel electrode overlapping with the common electrode, and a common line. The common line is connected to the common electrode and overlaps with a gap between the common electrode and the data line.
1. An array substrate of a liquid crystal display device, comprising:
a plurality of pixel areas;
an insulation substrate;
a gate line extending in a first direction;
a data line;
a thin film transistor connected to the gate line and the data line;
a common electrode disposed at each of the plurality of pixel areas;
a pixel electrode overlapping with the common electrode; and
a common line connected to the common electrode and comprising a portion extended along a lateral gap between the common electrodes adjacent to each other in the first direction when viewed perpendicular to the insulation substrate from above and covering the lateral gap between the common electrodes adjacent to each other in the first direction,
wherein the extended portion of the common line completely overlaps with the data line and a gap between each common electrode and the data line in the first direction when viewed perpendicular to the insulation substrate from above.
2. The array substrate of claim 1 , wherein the common electrode has a plate shape, and
wherein the pixel electrode comprises horizontal parts having a stripe shape and a vertical part disposed between the horizontal parts and connecting the horizontal parts.
3. The array substrate of claim 2 , wherein the vertical part connects end portions of the horizontal parts.
4. The array substrate of claim 3 , wherein the vertical part is arranged in a straight line.
5. The array substrate of claim 3 , wherein the vertical part shifts back and forth from left to right.
6. The array substrate of claim 2 , wherein the vertical part crosses the horizontal parts and connects adjacent horizontal parts.
7. The array substrate of claim 6 , wherein the vertical part is arranged in a straight line.
8. The array substrate of claim 6 , wherein the vertical part shifts back and forth from left to right.
9. The array substrate of claim 1 , wherein the common line and the gate line are arranged on substantially the same layer.
10. The array substrate of claim 1 , wherein the thin film transistor comprises:
a gate electrode;
an activation layer disposed on the gate electrode and insulated from the gate electrode; and
a source electrode and a drain electrode spaced apart from each other on the activation layer.
11. The array substrate of claim 1 , wherein the gate line and the data line comprise at least one metal or alloy of metal selected from the group consisting of molybdenum (Mo), niobium (Nb), copper (Cu), aluminum (Al), chrome (Cr), silver (Ag), and tungsten (W).
12. The array substrate of claim 1 , wherein the common line comprises at least one metal or alloy of metal selected from the group consisting of molybdenum (Mo), niobium (Nb), copper (Cu), aluminum (Al), chrome (Cr), silver (Ag), and tungsten (W).
13. The array substrate of claim 1 , wherein the common electrode and the pixel electrode comprise a transparent conductive material.
14. The array substrate of claim 13 , wherein the transparent conductive material comprises at least one material selected from the group consisting of indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO).
15. A method of manufacturing an array substrate of a liquid crystal display device, comprising:
forming a common electrode at each of a plurality of pixel areas of an insulation substrate;
forming a first metallic pattern comprising a gate line, a gate electrode extended in a first direction, and a common line, the common line connected to the common electrode and comprising a portion extended along a lateral gap between the common electrodes adjacent to each other in the first direction when viewed perpendicular to the insulation substrate;
forming a gate insulation layer on the first metallic pattern;
forming an activation layer on the gate insulation layer to overlap with the gate electrode;
forming a second metallic pattern comprising a data line overlapping with the common line and a source electrode and a drain electrode spaced apart from each other on the activation layer so that the extended portion of the common line covers the lateral gap between the common electrodes adjacent to each other in the first direction, and the data line, a first gap between the common electrode and the data line, and a second gap between the adjacent common electrodes and the data line are completely overlapped by the extended portion of the common line in the first direction;
forming a protective layer on the second metallic pattern; and
forming a pixel electrode on the protective layer.
16. The method of claim 15 , wherein the common electrode has as a plate shape, and
the pixel electrode comprises horizontal parts having stripe shapes and a vertical part disposed between adjacent horizontal parts to connect to the adjacent horizontal parts.
17. The method of claim 16 , wherein the vertical part connects end portions of the horizontal parts, and
wherein the vertical part is arranged in a straight line.
18. The method of claim 16 , wherein the vertical part connects end portions of the horizontal parts, and
wherein the vertical part shifts back and forth from left to right.
19. The method of claim 16 , wherein the vertical parts cross the horizontal parts and connect adjacent horizontal parts, and
wherein the vertical part is arranged in a straight line.
20. The method of claim 16 , wherein the vertical parts cross the horizontal parts and connect adjacent horizontal parts, and
wherein the vertical part shifts back and forth from left to right.
21. The array substrate of claim 1 , wherein the pixel area is defined by the gate line and the data line, and
the common electrode is spaced apart from an adjacent common electrode disposed on an adjacent pixel area.
22. The array substrate of claim 3 , wherein two horizontal parts adjacent to each other with the vertical part interposed therebetween, are parallel to each other.
23. The array substrate of claim 22 , wherein other end portions of the horizontal parts are overlapped with the common line when viewed perpendicular to the insulation substrate from above.
24. The array substrate of claim 23 , wherein the other end portions of the horizontal parts are separated from each other.
25. An array substrate of a liquid crystal display device, comprising:
an insulation substrate;
a gate line;
a data line;
a thin film transistor connected to the gate line and the data line;
a common electrode disposed at a pixel area;
a common line connected to the common electrode; and
a pixel electrode overlapping with the common electrode,
wherein the pixel electrode comprises first and second horizontal parts having a stripe shape and a vertical part disposed to cross between the first horizontal parts and second horizontal parts and connecting the first and second horizontal parts, the first horizontal parts and the second horizontal parts are separated from each other and disposed on same straight line, the first horizontal parts comprise upper first horizontal parts extending in a first direction from the vertical part and lower first horizontal parts extending in a second direction from the vertical part, and the second horizontal parts comprise upper second horizontal parts arranged opposite the upper first horizontal parts and extending in a direction opposite to the first direction and lower second horizontal parts arranged opposite the lower first horizontal parts and extending in a direction opposite to the second direction.
26. The array substrate of claim 25 , wherein the gate line extends in a third direction, wherein the first direction and the second direction are not parallel with the third direction.
27. The array substrate of claim 25 , wherein an upper first horizontal part and a lower first horizontal part are integrally formed at a central portion of the pixel electrode.
28. An array substrate of a liquid crystal display device comprising:
a plurality of pixel areas;
an insulation substrate;
a gate line extended in a first direction;
a data line;
a thin film transistor connected to the gate line and the data line;
a common electrode disposed at each of the plurality of pixel areas;
a pixel electrode overlapping with the common electrode; and
a common line connected to the common electrode and comprising a portion extended along a lateral gap between common electrodes adjacent to each other in the first direction when viewed perpendicular to the insulation substrate from above and covering the lateral gap between the common electrodes adjacent to each other in the first direction,
wherein the extended portion of the common line completely overlaps with the data line and a gap between each common electrode and the data line in the first direction when viewed perpendicular to the insulation substrate from above,
wherein the pixel electrode comprises first and second horizontal parts having a stripe shape and a vertical part disposed to cross between the first horizontal parts and second horizontal parts and connecting the first and second horizontal parts, the first horizontal parts and the second horizontal parts are separated each other and disposed on same straight line, the first horizontal parts comprise upper first horizontal parts extend in a first direction from the vertical part and lower first horizontal parts extend in a second direction from the vertical part, and the second horizontal parts comprise upper second horizontal parts extend in the first direction and lower second horizontal parts extend in the second direction, and
wherein a length of the upper first horizontal part and a length of the upper second horizontal part are different from each other in the first direction and a length of the lower first horizontal part and a length of the lower second horizontal part are different from each other in the second direction.