IP Library Granted Patent US 8,724,694
Granted Patent B2
US 8,724,694 · App. 12/251,221 · Granted May 13, 2014

On-the spot deblocker in a decoding pipeline

Inventor: Wei Jia (San Jose, CA)
Assignee: Nvidia Corporation
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Quick Facts
Patent No.
US 8,724,694
App. No.
12/251,221
Granted
May 13, 2014
Kind
B2
Abstract

A decoder pipeline may include a decoding (prior to deblocking) stage followed by a deblocking stage. A memory can be coupled to the decoder pipeline. A decoded first macroblock can be output from the decoding stage directly into the deblocking stage, bypassing the memory, if a decoded second macroblock depended on to deblock the first macroblock is already deblocked. Otherwise, the decoded first macroblock is stored in the memory until the second macroblock is deblocked and available to deblock the first macroblock.

Claims (48)

1. A computer-implemented method of processing frames of data in a decoder, the method comprising:

receiving encoded frames as inputs to a first stage of the decoder;

decoding the encoded frames in the first stage to produce decoded frames, the encoded frames comprising an encoded first frame and the decoded frames comprising a decoded first frame produced using the encoded first frame, the decoding comprising decoding an encoded first macroblock in the encoded first frame to produce a decoded first macroblock comprising the decoded first macroblock;

forwarding the decoded first frame from the first stage to a second stage of the decoder, wherein the second stage comprises a first deblocker and a second deblocker that are operable for deblocking different decoded frames in parallel and at the same time; and

deblocking the decoded first macroblock in parallel with decoding another encoded macroblock in the encoded first frame provided a decoded second macroblock relied upon for the deblocking is already deblocked, and otherwise storing the decoded first macroblock in memory prior to the deblocking.

2. The method of claim 1 further comprising associating information with the decoded first macroblock to indicate whether the decoded first macroblock is deblocked.

3. The method of claim 1 further comprising:

initializing an array, wherein the array comprises a bit value for each macroblock in the decoded first frame; and

setting a bit value in the array to indicate whether the decoded first macroblock has been deblocked.

4. The method of claim 1 wherein the decoded second macroblock is adjacent to the decoded first macroblock within the decoded first frame.

5. The method of claim 1 further comprising:

associating a first macroblock number with the decoded first macroblock; and

associating a second macroblock number with the decoded second macroblock, wherein the first and second macroblock numbers are consecutive values.

6. The method of claim 1 further comprising:

accessing the decoded first macroblock in the memory after the decoded second macroblock is deblocked; and

deblocking the decoded first macroblock.

7. The method of claim 6 further comprising:

identifying a decoded third macroblock that relies upon the decoded first macroblock for deblocking; and

deblocking the decoded third macroblock after the decoded first macroblock is deblocked.

8. The method of claim 1 further comprising deblocking a decoded second frame in parallel with the deblocking of the decoded first frame.

9. The method of claim 1 further comprising deblocking the decoded first frame using the first deblocker if the decoded first frame is identified as a first type of frame and deblocking the decoded first frame using the second deblocker if the decoded first frame is identified as a second type of frame.

10. A computer system comprising:

a decoder pipeline comprising a decoding stage followed by a downstream deblocking stage, the decoding stage operable for decoding encoded frames to produce decoded frames, the encoded frames comprising an encoded first frame and the decoded frames comprising a decoded first frame produced using the encoded first frame, the decoded first frame comprising a decoded first macroblock and the deblocking stage comprising a first deblocker and a second deblocker that are operable for deblocking different decoded frames in parallel and concurrently; and

a memory coupled to the decoder pipeline; wherein the decoded first macroblock is output from the decoding stage directly into the deblocking stage, bypassing the memory, if a decoded second macroblock depended upon to deblock the decoded first macroblock is already deblocked, wherein otherwise the decoded first macroblock is stored in the memory until the decoded second macroblock is deblocked and available to deblock the decoded first macroblock; wherein the decoded first macroblock is deblocked in parallel with decoding another encoded macroblock in the frame provided the decoded second macroblock is already deblocked, wherein otherwise the decoded first macroblock is stored in the memory prior to being deblocked.

11. The computer system of claim 10 wherein the decoded first macroblock is flagged when stored in the memory to indicate that the decoded first macroblock is not deblocked.

12. The computer system of claim 10 wherein the decoded second macroblock is adjacent to the decoded first macroblock within the decoded first frame.

13. The computer system of claim 10 wherein the decoded first macroblock is associated with a first macroblock number and the decoded second macroblock is associated with a second macroblock number, wherein the first and second macroblock numbers are consecutive values.

14. The computer system of claim 10 wherein, after the decoded first macroblock is deblocked, the deblocking stage deblocks any decoded macroblock that depends on the decoded first macroblock for deblocking.

15. A memory having computer-executable instructions stored thereon for performing a method of processing a frame comprising video data, the method comprising:

receiving encoded frames as inputs to a decoding stage of a decoder pipeline;

decoding the encoded frames in the decoding stage to produce decoded frames, the encoded frames comprising an encoded first frame and the decoded frames comprising a decoded first frame produced using the encoded first frame, the decoding comprising decoding an encoded first macroblock in the encoded first frame to produce a decoded first macroblock and decoding an encoded second macroblock in the encoded first frame to produce a decoded second macroblock;

accessing a first macroblock number associated with the decoded first macroblock;

comparing the first macroblock number to a second macroblock number associated with the decoded second macroblock, wherein the decoded second macroblock immediately precedes the decoded first macroblock in processing order in the decoder pipeline;

forwarding the decoded first macroblock to a deblocking stage in the decoder pipeline if the first and second macroblock numbers are consecutive numbers and otherwise storing the decoded first macroblock in a memory coupled to the decoder pipeline, wherein the deblocking stage comprises a first deblocker and a second deblocker that are operable for deblocking different decoded frames in parallel and at the same time; and

deblocking the decoded first macroblock in parallel with decoding another encoded macroblock in the encoded first frame provided the decoded second macroblock relied upon for the deblocking is already deblocked, and otherwise storing the decoded first macroblock in the memory prior to the deblocking.

16. The memory of claim 15 wherein the method further comprises:

initializing an array, wherein the array comprises a bit value for each macroblock in the decoded first frame; and

setting a bit value in the array to indicate that the decoded first macroblock has not been deblocked.

17. The memory of claim 15 wherein the method further comprises:

accessing the decoded first macroblock in the memory after the decoded second macroblock is deblocked; and

deblocking the decoded first macroblock.

18. The memory of claim 17 wherein the method further comprises:

identifying a decoded third macroblock that relies upon the decoded first macroblock for deblocking; and

deblocking the decoded third macroblock after the decoded first macroblock is deblocked.

19. The memory of claim 15 wherein the method further comprises:

accessing an array, wherein the array comprises a plurality of flag bits and wherein each decoded macroblock in the decoded first frame is associated with a respective one of the flag bits, wherein the flag bits are set to identify decoded macroblocks that have not been deblocked;

identifying a plurality of decoded macroblocks having flag bits that are set and also having consecutive macroblock numbers, wherein the consecutive macroblock numbers include a third macroblock number that is consecutive with the first macroblock number; and

deblocking the plurality of decoded macroblocks after the decoded first macroblock is deblocked.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2008
From: JIA, WEI
To: NVIDIA CORPORATION
Reel/Frame 021681/0811 →
Continuity (1)
Related Publication 20100091836A1 · Apr 15, 2010