Granted Patent B2

US 7,801,161 · App. 12/254,187 · Granted Sep 21, 2010

Abstract

Claims (29)

1. A gigabit passive optical network (GPON) residential gateway, comprising:

a microprocessor for at least processing packets including voice data and packets including video data;

dual packet processors for performing GPON and residential gateway processing tasks;

a plurality of Ethernet media access control (MAC) adapters for interfacing with a plurality of subscriber devices;

a GPON MAC adapter for interfacing with an optical line terminal (OLT) of the GPON;

a digital signal processor (DSP) for processing voice signals;

a broad bus for enabling fast communication to the dual packet processors, the plurality of Ethernet MAC adapters, and the GPON adapter;

a memory controller for interfacing with an external memory; and

a dual memory access coupled between the broad bus and the memory controller.

2. The GPON residential gateway of claim 1 , wherein the GPON residential gateway supports a bundle of high speed data services.

3. The GPON residential gateway of claim 2 , wherein the high speed data services includes at least data, voice, and video.

4. The GPON residential gateway of claim 1 , wherein said microprocessor completes the execution of a single processing task in a single clock cycle.

5. The GPON residential gateway of claim 1 , wherein the subscriber devices include at least one of: a telephone device, a computer, a set-top box.

6. The GPON residential gateway of claim 1 , wherein the GPON processing tasks carried by the dual packet processors include at least: bridge learning, queuing packets, shaping packets, and reassembling of packets.

7. The GPON residential gateway of claim 1 , wherein the residential gateway processing tasks carried by the dual packet processors include at least: encrypting packets, decrypting packets, switching packets, bridging packets, blocking unauthorized access, and translating network addresses.

8. The GPON residential gateway of claim 7 , wherein each of the dual packet processors comprising at least: dual core processors; a plurality of hardware (HW) accelerators; and a memory unit.

9. The GPON residential gateway of claim 8 , wherein the plurality of hardware (HW) accelerators include: a lookup table, a cyclical redundancy checking (CRC) accelerator, a scheduler, a register file, a direct memory access (DMA), a board bus interface, a security engine, and a classifier.

10. The GPON residential gateway of claim 2 , is fabricated of on a single integrated circuit (IC).

11. A method for processing gigabit passive optical network (GPON) downstream traffic by a GPON residential gateway, wherein the downstream traffic includes a bundle of high speed data services, comprising:

receiving data fragments of a data packet sent from the an optical line terminal (OLT) of a GPON;

reassembling said data fragments into a packet;

performing residential gateway processing on the reassembled packet;

forwarding the processed packet to a destination subscriber device through a Ethernet MAC adapter;

determining a residential gateway processing task required for the classified packet; and

processing the packet according the required processing task, wherein the required processing task includes at least any of decrypting the packet, switching the packet, bridging the packet, and blocking the packet.

12. The method of claim 11 , wherein performing residential gateway processing of the packet further comprising:

classifying the packet using a header of the packet.

13. The method of claim 11 , further comprising:

checking correctness of said reassembled packets.

Assignments (9)