Interleaved switching converter, and switching controller and controlling method thereof
View Patent ↗In an interleaved switching converter, a first converter including a first switch is coupled to a second converter including a second switch. A switching controller for controlling the first switch and the second switch outputs a second control signal for operating the second switch based a first control signal for operating the first switch. A phase shift between the first control signal and the second control signal is 180 degrees.
1. A switching controller of an interleaved switching converter comprising a first converter and a second converter coupled in parallel, the first converter using a first switch operated by a first control signal and the second converter using a second switch operated by a second control signal, the switching controller comprising:
a third switch coupled between a first voltage source and a node, configured to turn on in response to a first pulse signal corresponding to the first control signal;
a capacitor coupled to the node;
an amplifier configured to output a current corresponding to a difference between a reference voltage and a voltage corresponding to a voltage of the capacitor;
a comparator configured to compare an output voltage corresponding to the current output from the amplifier with the voltage of the capacitor, and to output a second pulse signal according to the comparison; and
a fourth switch coupled between the node and a second voltage source, configured to turn on in response to a third pulse signal, the third pulse signal being generated by the second pulse signal and determining a leading edge of the second control signal.
2. The switching controller of claim 1 , wherein the capacitor is charged when the third switch is turned on, and the capacitor is discharged when the fourth switch is turned on.
3. The switching controller of claim 2 , further comprising:
a first current source coupled between the first voltage source and the third switch; and
a second current source coupled between the second voltage source and the fourth switch.
4. The switching controller of claim 2 , wherein the voltage corresponding to the voltage of the capacitor increases as the voltage of the capacitor at a turn-on time of the third switch increases.
5. The switching controller of claim 2 , further comprising
a sample/holder configured to sample the voltage of the capacitor at a turn-on time of the third switch, and to output the sampled voltage as the voltage corresponding to the voltage of the capacitor.
6. The switching controller of claim 2 , further comprising
a low pass filter configured to filter the voltage of the capacitor, and to output the filtered voltage as the voltage corresponding to the voltage of the capacitor.
7. The switching controller of claim 2 , further comprising
a reset circuit configured to reset the capacitor when the leading edge of the second control signal does not exist during one switching cycle of the first control signal.
8. The switching controller of claim 7 , wherein the reset circuit comprises:
a fifth switch coupled to the capacitor in parallel; and
a reset controller configured to generate a selection signal based on the first pulse signal and the third pulse signal, and to determine an on/off state of the fifth switch in accordance with the selection signal.
9. The switching controller of claim 7 , wherein the reset circuit comprises:
a one-shot vibrator configured to generate a start signal based on the first pulse signal; and
a multiplexer configured to select one of the start signal and the third pulse signal, and to output the selected signal to the fourth switch.
10. The switching controller of claim 9 , wherein the reset controller further comprises:
an SR latch configured to receive the first pulse signal and the third pulse signal; and
a D flipflop that includes an input terminal receiving an output of the SR latch, a clock terminal receiving the first control signal, and an output terminal outputting the selection signal.
11. The switching controller of claim 2 , further comprising:
a first pulse generator configured to generate the first pulse signal based on the first control signal, and
a second pulse generator configured to generate the third pulse signal based on the second pulse signal.
12. The switching controller of claim 11 , wherein
the first pulse generator is configured to detect a leading edge of the first control signal and to generate the first pulse signal in accordance with the leading edge of the first control signal, and
the second pulse generator configured to detect a leading edge of the second pulse signal and to generate the third pulse signal in accordance with the leading edge of the second pulse signal.
13. An interleaved switching converter comprising:
a first converter configured to include a first switch operated in response to a first control signal, and to generate a first output voltage corresponding to an input voltage by using the first switch;
a second converter coupled to the first converter in parallel, that includes a second switch operated in response to a second control signal, the second converter configured to generate a second output voltage corresponding to the input voltage by using the second switch; and
a switching controller configured to determine a leading edge of the second control signal based on the first control signal,
wherein the switching controller comprises:
a capacitor that is charged in response to a first pulse signal corresponding to the first control signal and is discharged in response to a second pulse signal,
an amplifier configured to output a current corresponding to a difference between a reference voltage and a voltage corresponding to a voltage of the capacitor,
a comparator configured to compare an output voltage corresponding to the current output from the amplifier with the voltage of the capacitor, and to output a third pulse signal according to the comparison, and
a pulse generator configured to determine a leading edge of the second pulse signal based on the third pulse signal, the leading edge of the second control signal being determined by the leading edge of the second pulse signal.
14. The interleaved switching converter of claim 13 , wherein the pulse generator is configured to detect a leading edge of the third pulse signal, and to determine the leading edge of the second pulse signal in accordance with the leading edge of the third pulse signal.
15. The switching controller of claim 13 , wherein the voltage corresponding to the voltage of the capacitor increases as the voltage of the capacitor at a turn-on time of the third switch increases.
16. The interleaved switching converter of claim 13 , further comprising a reset circuit configured to detect an error of the switching controller based on the first pulse signal and the second pulse signal, and to reset the capacitor in accordance with the error.
17. The interleaved switching converter of claim 13 , wherein a phase shift between the first control signal and the second control signal is 180 degrees.
18. The interleaved switching converter of claim 13 , wherein each of the first switch, the second switch, and the switching controller is formed in separate packages.
19. The interleaved switching converter of claim 13 , wherein the first switch, the second switch, and the switching controller are formed in a single package.
20. A method of controlling an interleaved switching converter including a first converter and a second converter coupled to the first converter in parallel, the first converter including a first switch operated by a first control signal, and the second converter including a second switch operated by a second control signal, the method comprising:
generating a first pulse signal in accordance with a leading edge of the first control signal;
charging a capacitor in response to the first pulse signal;
generating a second pulse signal based on a voltage of the capacitor;
generating a third pulse signal in accordance with a leading edge of the second pulse signal;
discharging the capacitor in response to the third pulse signal; and
determining a leading edge of the second control signal in accordance with a leading edge of the third pulse signal.
21. The method of claim 20 , wherein the generation of the second pulse signal comprises:
outputting a current corresponding to a difference between a reference voltage and a voltage at a charging time of the capacitor; and
generating the third pulse signal by comparing a voltage corresponding to the current with the voltage of the capacitor.
22. The method of claim 20 , further comprising resetting the capacitor when the leading edge the third pulse signal is not generated during a switching cycle of the first pulse signal.